2 ******************************************************************************
3 * @file startup_stm32f767xx.s
4 * @author MCD Application Team
7 * @brief STM32F767xx Devices vector table for GCC based toolchain.
8 * This module performs:
10 * - Set the initial PC == Reset_Handler,
11 * - Set the vector table entries with the exceptions ISR address
12 * - Branches to main in the C library (which eventually
14 * After Reset the Cortex-M7 processor is in Thread mode,
15 * priority is Privileged, and the Stack is set to Main.
16 ******************************************************************************
19 * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2>
21 * Redistribution and use in source and binary forms, with or without modification,
22 * are permitted provided that the following conditions are met:
23 * 1. Redistributions of source code must retain the above copyright notice,
24 * this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright notice,
26 * this list of conditions and the following disclaimer in the documentation
27 * and/or other materials provided with the distribution.
28 * 3. Neither the name of STMicroelectronics nor the names of its contributors
29 * may be used to endorse or promote products derived from this software
30 * without specific prior written permission.
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 ******************************************************************************
52 .global Default_Handler
54 /* start address for the initialization values of the .data section.
55 defined in linker script */
57 /* start address for the .data section. defined in linker script */
59 /* end address for the .data section. defined in linker script */
61 /* start address for the .bss section. defined in linker script */
63 /* end address for the .bss section. defined in linker script */
65 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
68 * @brief This is the code that gets called when the processor first
69 * starts execution following a reset event. Only the absolutely
70 * necessary set is performed, after which the application
71 * supplied main() routine is called.
76 .section .text.Reset_Handler
78 .type Reset_Handler, %function
80 ldr sp, =_estack /* set stack pointer */
82 /* Copy the data segment initializers from flash to SRAM */
100 /* Zero fill the bss segment. */
110 /* Call the clock system initialization function.*/
112 /* Call static constructors */
114 /* Call the application's entry point.*/
117 .size Reset_Handler, .-Reset_Handler
120 * @brief This is the code that gets called when the processor receives an
121 * unexpected interrupt. This simply enters an infinite loop, preserving
122 * the system state for examination by a debugger.
126 .section .text.Default_Handler,"ax",%progbits
130 .size Default_Handler, .-Default_Handler
131 /******************************************************************************
133 * The minimal vector table for a Cortex M7. Note that the proper constructs
134 * must be placed on this to ensure that it ends up at physical address
137 *******************************************************************************/
138 .section .isr_vector,"a",%progbits
139 .type g_pfnVectors, %object
140 .size g_pfnVectors, .-g_pfnVectors
148 .word HardFault_Handler
149 .word MemManage_Handler
150 .word BusFault_Handler
151 .word UsageFault_Handler
157 .word DebugMon_Handler
160 .word SysTick_Handler
162 /* External Interrupts */
163 .word WWDG_IRQHandler /* Window WatchDog */
164 .word PVD_IRQHandler /* PVD through EXTI Line detection */
165 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
166 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
167 .word FLASH_IRQHandler /* FLASH */
168 .word RCC_IRQHandler /* RCC */
169 .word EXTI0_IRQHandler /* EXTI Line0 */
170 .word EXTI1_IRQHandler /* EXTI Line1 */
171 .word EXTI2_IRQHandler /* EXTI Line2 */
172 .word EXTI3_IRQHandler /* EXTI Line3 */
173 .word EXTI4_IRQHandler /* EXTI Line4 */
174 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
175 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
176 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
177 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
178 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
179 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
180 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
181 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
182 .word CAN1_TX_IRQHandler /* CAN1 TX */
183 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
184 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
185 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
186 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
187 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
188 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
189 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
190 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
191 .word TIM2_IRQHandler /* TIM2 */
192 .word TIM3_IRQHandler /* TIM3 */
193 .word TIM4_IRQHandler /* TIM4 */
194 .word I2C1_EV_IRQHandler /* I2C1 Event */
195 .word I2C1_ER_IRQHandler /* I2C1 Error */
196 .word I2C2_EV_IRQHandler /* I2C2 Event */
197 .word I2C2_ER_IRQHandler /* I2C2 Error */
198 .word SPI1_IRQHandler /* SPI1 */
199 .word SPI2_IRQHandler /* SPI2 */
200 .word USART1_IRQHandler /* USART1 */
201 .word USART2_IRQHandler /* USART2 */
202 .word USART3_IRQHandler /* USART3 */
203 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
204 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
205 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
206 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
207 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
208 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
209 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
210 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
211 .word FMC_IRQHandler /* FMC */
212 .word SDMMC1_IRQHandler /* SDMMC1 */
213 .word TIM5_IRQHandler /* TIM5 */
214 .word SPI3_IRQHandler /* SPI3 */
215 .word UART4_IRQHandler /* UART4 */
216 .word UART5_IRQHandler /* UART5 */
217 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
218 .word TIM7_IRQHandler /* TIM7 */
219 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
220 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
221 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
222 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
223 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
224 .word ETH_IRQHandler /* Ethernet */
225 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
226 .word CAN2_TX_IRQHandler /* CAN2 TX */
227 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
228 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
229 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
230 .word OTG_FS_IRQHandler /* USB OTG FS */
231 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
232 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
233 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
234 .word USART6_IRQHandler /* USART6 */
235 .word I2C3_EV_IRQHandler /* I2C3 event */
236 .word I2C3_ER_IRQHandler /* I2C3 error */
237 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
238 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
239 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
240 .word OTG_HS_IRQHandler /* USB OTG HS */
241 .word DCMI_IRQHandler /* DCMI */
242 .word 0 /* Reserved */
243 .word RNG_IRQHandler /* RNG */
244 .word FPU_IRQHandler /* FPU */
245 .word UART7_IRQHandler /* UART7 */
246 .word UART8_IRQHandler /* UART8 */
247 .word SPI4_IRQHandler /* SPI4 */
248 .word SPI5_IRQHandler /* SPI5 */
249 .word SPI6_IRQHandler /* SPI6 */
250 .word SAI1_IRQHandler /* SAI1 */
251 .word LTDC_IRQHandler /* LTDC */
252 .word LTDC_ER_IRQHandler /* LTDC error */
253 .word DMA2D_IRQHandler /* DMA2D */
254 .word SAI2_IRQHandler /* SAI2 */
255 .word QUADSPI_IRQHandler /* QUADSPI */
256 .word LPTIM1_IRQHandler /* LPTIM1 */
257 .word CEC_IRQHandler /* HDMI_CEC */
258 .word I2C4_EV_IRQHandler /* I2C4 Event */
259 .word I2C4_ER_IRQHandler /* I2C4 Error */
260 .word SPDIF_RX_IRQHandler /* SPDIF_RX */
261 .word 0 /* Reserved */
262 .word DFSDM1_FLT0_IRQHandler /* DFSDM1 Filter 0 global Interrupt */
263 .word DFSDM1_FLT1_IRQHandler /* DFSDM1 Filter 1 global Interrupt */
264 .word DFSDM1_FLT2_IRQHandler /* DFSDM1 Filter 2 global Interrupt */
265 .word DFSDM1_FLT3_IRQHandler /* DFSDM1 Filter 3 global Interrupt */
266 .word SDMMC2_IRQHandler /* SDMMC2 */
267 .word CAN3_TX_IRQHandler /* CAN3 TX */
268 .word CAN3_RX0_IRQHandler /* CAN3 RX0 */
269 .word CAN3_RX1_IRQHandler /* CAN3 RX1 */
270 .word CAN3_SCE_IRQHandler /* CAN3 SCE */
271 .word JPEG_IRQHandler /* JPEG */
272 .word MDIOS_IRQHandler /* MDIOS */
274 /*******************************************************************************
276 * Provide weak aliases for each Exception handler to the Default_Handler.
277 * As they are weak aliases, any function with the same name will override
280 *******************************************************************************/
282 .thumb_set NMI_Handler,Default_Handler
284 .weak HardFault_Handler
285 .thumb_set HardFault_Handler,Default_Handler
287 .weak MemManage_Handler
288 .thumb_set MemManage_Handler,Default_Handler
290 .weak BusFault_Handler
291 .thumb_set BusFault_Handler,Default_Handler
293 .weak UsageFault_Handler
294 .thumb_set UsageFault_Handler,Default_Handler
297 .thumb_set SVC_Handler,Default_Handler
299 .weak DebugMon_Handler
300 .thumb_set DebugMon_Handler,Default_Handler
303 .thumb_set PendSV_Handler,Default_Handler
305 .weak SysTick_Handler
306 .thumb_set SysTick_Handler,Default_Handler
308 .weak WWDG_IRQHandler
309 .thumb_set WWDG_IRQHandler,Default_Handler
312 .thumb_set PVD_IRQHandler,Default_Handler
314 .weak TAMP_STAMP_IRQHandler
315 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
317 .weak RTC_WKUP_IRQHandler
318 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
320 .weak FLASH_IRQHandler
321 .thumb_set FLASH_IRQHandler,Default_Handler
324 .thumb_set RCC_IRQHandler,Default_Handler
326 .weak EXTI0_IRQHandler
327 .thumb_set EXTI0_IRQHandler,Default_Handler
329 .weak EXTI1_IRQHandler
330 .thumb_set EXTI1_IRQHandler,Default_Handler
332 .weak EXTI2_IRQHandler
333 .thumb_set EXTI2_IRQHandler,Default_Handler
335 .weak EXTI3_IRQHandler
336 .thumb_set EXTI3_IRQHandler,Default_Handler
338 .weak EXTI4_IRQHandler
339 .thumb_set EXTI4_IRQHandler,Default_Handler
341 .weak DMA1_Stream0_IRQHandler
342 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
344 .weak DMA1_Stream1_IRQHandler
345 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
347 .weak DMA1_Stream2_IRQHandler
348 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
350 .weak DMA1_Stream3_IRQHandler
351 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
353 .weak DMA1_Stream4_IRQHandler
354 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
356 .weak DMA1_Stream5_IRQHandler
357 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
359 .weak DMA1_Stream6_IRQHandler
360 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
363 .thumb_set ADC_IRQHandler,Default_Handler
365 .weak CAN1_TX_IRQHandler
366 .thumb_set CAN1_TX_IRQHandler,Default_Handler
368 .weak CAN1_RX0_IRQHandler
369 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
371 .weak CAN1_RX1_IRQHandler
372 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
374 .weak CAN1_SCE_IRQHandler
375 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
377 .weak EXTI9_5_IRQHandler
378 .thumb_set EXTI9_5_IRQHandler,Default_Handler
380 .weak TIM1_BRK_TIM9_IRQHandler
381 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
383 .weak TIM1_UP_TIM10_IRQHandler
384 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
386 .weak TIM1_TRG_COM_TIM11_IRQHandler
387 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
389 .weak TIM1_CC_IRQHandler
390 .thumb_set TIM1_CC_IRQHandler,Default_Handler
392 .weak TIM2_IRQHandler
393 .thumb_set TIM2_IRQHandler,Default_Handler
395 .weak TIM3_IRQHandler
396 .thumb_set TIM3_IRQHandler,Default_Handler
398 .weak TIM4_IRQHandler
399 .thumb_set TIM4_IRQHandler,Default_Handler
401 .weak I2C1_EV_IRQHandler
402 .thumb_set I2C1_EV_IRQHandler,Default_Handler
404 .weak I2C1_ER_IRQHandler
405 .thumb_set I2C1_ER_IRQHandler,Default_Handler
407 .weak I2C2_EV_IRQHandler
408 .thumb_set I2C2_EV_IRQHandler,Default_Handler
410 .weak I2C2_ER_IRQHandler
411 .thumb_set I2C2_ER_IRQHandler,Default_Handler
413 .weak SPI1_IRQHandler
414 .thumb_set SPI1_IRQHandler,Default_Handler
416 .weak SPI2_IRQHandler
417 .thumb_set SPI2_IRQHandler,Default_Handler
419 .weak USART1_IRQHandler
420 .thumb_set USART1_IRQHandler,Default_Handler
422 .weak USART2_IRQHandler
423 .thumb_set USART2_IRQHandler,Default_Handler
425 .weak USART3_IRQHandler
426 .thumb_set USART3_IRQHandler,Default_Handler
428 .weak EXTI15_10_IRQHandler
429 .thumb_set EXTI15_10_IRQHandler,Default_Handler
431 .weak RTC_Alarm_IRQHandler
432 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
434 .weak OTG_FS_WKUP_IRQHandler
435 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
437 .weak TIM8_BRK_TIM12_IRQHandler
438 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
440 .weak TIM8_UP_TIM13_IRQHandler
441 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
443 .weak TIM8_TRG_COM_TIM14_IRQHandler
444 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
446 .weak TIM8_CC_IRQHandler
447 .thumb_set TIM8_CC_IRQHandler,Default_Handler
449 .weak DMA1_Stream7_IRQHandler
450 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
453 .thumb_set FMC_IRQHandler,Default_Handler
455 .weak SDMMC1_IRQHandler
456 .thumb_set SDMMC1_IRQHandler,Default_Handler
458 .weak TIM5_IRQHandler
459 .thumb_set TIM5_IRQHandler,Default_Handler
461 .weak SPI3_IRQHandler
462 .thumb_set SPI3_IRQHandler,Default_Handler
464 .weak UART4_IRQHandler
465 .thumb_set UART4_IRQHandler,Default_Handler
467 .weak UART5_IRQHandler
468 .thumb_set UART5_IRQHandler,Default_Handler
470 .weak TIM6_DAC_IRQHandler
471 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
473 .weak TIM7_IRQHandler
474 .thumb_set TIM7_IRQHandler,Default_Handler
476 .weak DMA2_Stream0_IRQHandler
477 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
479 .weak DMA2_Stream1_IRQHandler
480 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
482 .weak DMA2_Stream2_IRQHandler
483 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
485 .weak DMA2_Stream3_IRQHandler
486 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
488 .weak DMA2_Stream4_IRQHandler
489 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
491 .weak DMA2_Stream4_IRQHandler
492 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
495 .thumb_set ETH_IRQHandler,Default_Handler
497 .weak ETH_WKUP_IRQHandler
498 .thumb_set ETH_WKUP_IRQHandler,Default_Handler
500 .weak CAN2_TX_IRQHandler
501 .thumb_set CAN2_TX_IRQHandler,Default_Handler
503 .weak CAN2_RX0_IRQHandler
504 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
506 .weak CAN2_RX1_IRQHandler
507 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
509 .weak CAN2_SCE_IRQHandler
510 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
512 .weak OTG_FS_IRQHandler
513 .thumb_set OTG_FS_IRQHandler,Default_Handler
515 .weak DMA2_Stream5_IRQHandler
516 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
518 .weak DMA2_Stream6_IRQHandler
519 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
521 .weak DMA2_Stream7_IRQHandler
522 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
524 .weak USART6_IRQHandler
525 .thumb_set USART6_IRQHandler,Default_Handler
527 .weak I2C3_EV_IRQHandler
528 .thumb_set I2C3_EV_IRQHandler,Default_Handler
530 .weak I2C3_ER_IRQHandler
531 .thumb_set I2C3_ER_IRQHandler,Default_Handler
533 .weak OTG_HS_EP1_OUT_IRQHandler
534 .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
536 .weak OTG_HS_EP1_IN_IRQHandler
537 .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
539 .weak OTG_HS_WKUP_IRQHandler
540 .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
542 .weak OTG_HS_IRQHandler
543 .thumb_set OTG_HS_IRQHandler,Default_Handler
545 .weak DCMI_IRQHandler
546 .thumb_set DCMI_IRQHandler,Default_Handler
549 .thumb_set RNG_IRQHandler,Default_Handler
552 .thumb_set FPU_IRQHandler,Default_Handler
554 .weak UART7_IRQHandler
555 .thumb_set UART7_IRQHandler,Default_Handler
557 .weak UART8_IRQHandler
558 .thumb_set UART8_IRQHandler,Default_Handler
560 .weak SPI4_IRQHandler
561 .thumb_set SPI4_IRQHandler,Default_Handler
563 .weak SPI5_IRQHandler
564 .thumb_set SPI5_IRQHandler,Default_Handler
566 .weak SPI6_IRQHandler
567 .thumb_set SPI6_IRQHandler,Default_Handler
569 .weak SAI1_IRQHandler
570 .thumb_set SAI1_IRQHandler,Default_Handler
572 .weak LTDC_IRQHandler
573 .thumb_set LTDC_IRQHandler,Default_Handler
575 .weak LTDC_ER_IRQHandler
576 .thumb_set LTDC_ER_IRQHandler,Default_Handler
578 .weak DMA2D_IRQHandler
579 .thumb_set DMA2D_IRQHandler,Default_Handler
581 .weak SAI2_IRQHandler
582 .thumb_set SAI2_IRQHandler,Default_Handler
584 .weak QUADSPI_IRQHandler
585 .thumb_set QUADSPI_IRQHandler,Default_Handler
587 .weak LPTIM1_IRQHandler
588 .thumb_set LPTIM1_IRQHandler,Default_Handler
591 .thumb_set CEC_IRQHandler,Default_Handler
593 .weak I2C4_EV_IRQHandler
594 .thumb_set I2C4_EV_IRQHandler,Default_Handler
596 .weak I2C4_ER_IRQHandler
597 .thumb_set I2C4_ER_IRQHandler,Default_Handler
599 .weak SPDIF_RX_IRQHandler
600 .thumb_set SPDIF_RX_IRQHandler,Default_Handler
602 .weak DFSDM1_FLT0_IRQHandler
603 .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
605 .weak DFSDM1_FLT1_IRQHandler
606 .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
608 .weak DFSDM1_FLT2_IRQHandler
609 .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
611 .weak DFSDM1_FLT3_IRQHandler
612 .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
614 .weak SDMMC2_IRQHandler
615 .thumb_set SDMMC2_IRQHandler,Default_Handler
617 .weak CAN3_TX_IRQHandler
618 .thumb_set CAN3_TX_IRQHandler,Default_Handler
620 .weak CAN3_RX0_IRQHandler
621 .thumb_set CAN3_RX0_IRQHandler,Default_Handler
623 .weak CAN3_RX1_IRQHandler
624 .thumb_set CAN3_RX1_IRQHandler,Default_Handler
626 .weak CAN3_SCE_IRQHandler
627 .thumb_set CAN3_SCE_IRQHandler,Default_Handler
629 .weak JPEG_IRQHandler
630 .thumb_set JPEG_IRQHandler,Default_Handler
632 .weak MDIOS_IRQHandler
633 .thumb_set MDIOS_IRQHandler,Default_Handler
635 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/