int/com/lib/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f7xx_hal_i2c.h
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    22-April-2016
   7   * @brief   Header file of I2C HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F7xx_HAL_I2C_H
  40 #define __STM32F7xx_HAL_I2C_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f7xx_hal_def.h"
  48
  49 /** @addtogroup STM32F7xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup I2C
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58 /** @defgroup I2C_Exported_Types I2C Exported Types
  59   * @{
  60   */
  61
  62 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
  63   * @brief  I2C Configuration Structure definition
  64   * @{
  65   */
  66 typedef struct
  67 {
  68   uint32_t Timing;              /*!< Specifies the I2C_TIMINGR_register value.
  69                                   This parameter calculated by referring to I2C initialization
  70                                          section in Reference manual */
  71
  72   uint32_t OwnAddress1;         /*!< Specifies the first device own address.
  73                                   This parameter can be a 7-bit or 10-bit address. */
  74
  75   uint32_t AddressingMode;      /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
  76                                   This parameter can be a value of @ref I2C_ADDRESSING_MODE */
  77
  78   uint32_t DualAddressMode;     /*!< Specifies if dual addressing mode is selected.
  79                                   This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
  80
  81   uint32_t OwnAddress2;         /*!< Specifies the second device own address if dual addressing mode is selected
  82                                   This parameter can be a 7-bit address. */
  83
  84   uint32_t OwnAddress2Masks;    /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
  85                                   This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
  86
  87   uint32_t GeneralCallMode;     /*!< Specifies if general call mode is selected.
  88                                   This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
  89
  90   uint32_t NoStretchMode;       /*!< Specifies if nostretch mode is selected.
  91                                   This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
  92
  93 }I2C_InitTypeDef;
  94
  95 /**
  96   * @}
  97   */
  98
  99 /** @defgroup HAL_state_structure_definition HAL state structure definition
 100   * @brief  HAL State structure definition
 101   * @note  HAL I2C State value coding follow below described bitmap :
 102   *          b7-b6  Error information
 103   *             00 : No Error
 104   *             01 : Abort (Abort user request on going)
 105   *             10 : Timeout
 106   *             11 : Error
 107   *          b5     IP initilisation status
 108   *             0  : Reset (IP not initialized)
 109   *             1  : Init done (IP initialized and ready to use. HAL I2C Init function called)
 110   *          b4     (not used)
 111   *             x  : Should be set to 0
 112   *          b3
 113   *             0  : Ready or Busy (No Listen mode ongoing)
 114   *             1  : Listen (IP in Address Listen Mode)
 115   *          b2     Intrinsic process state
 116   *             0  : Ready
 117   *             1  : Busy (IP busy with some configuration or internal operations)
 118   *          b1     Rx state
 119   *             0  : Ready (no Rx operation ongoing)
 120   *             1  : Busy (Rx operation ongoing)
 121   *          b0     Tx state
 122   *             0  : Ready (no Tx operation ongoing)
 123   *             1  : Busy (Tx operation ongoing)
 124   * @{
 125   */
 126
 127 typedef enum
 128 {
 129   HAL_I2C_STATE_RESET             = 0x00U,   /*!< Peripheral is not yet Initialized         */
 130   HAL_I2C_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use  */
 131   HAL_I2C_STATE_BUSY              = 0x24U,   /*!< An internal process is ongoing            */
 132   HAL_I2C_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing      */
 133   HAL_I2C_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing         */
 134   HAL_I2C_STATE_LISTEN            = 0x28U,   /*!< Address Listen Mode is ongoing            */
 135   HAL_I2C_STATE_BUSY_TX_LISTEN    = 0x29U,   /*!< Address Listen Mode and Data Transmission
 136                                                  process is ongoing                        */
 137   HAL_I2C_STATE_BUSY_RX_LISTEN    = 0x2AU,   /*!< Address Listen Mode and Data Reception
 138                                                  process is ongoing                        */
 139   HAL_I2C_STATE_ABORT             = 0x60,    /*!< Abort user request ongoing                */
 140   HAL_I2C_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state                             */
 141   HAL_I2C_STATE_ERROR             = 0xE0U    /*!< Error                                     */
 142
 143 }HAL_I2C_StateTypeDef;
 144
 145 /**
 146   * @}
 147   */
 148
 149 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
 150   * @brief  HAL Mode structure definition
 151   * @note  HAL I2C Mode value coding follow below described bitmap :
 152   *          b7     (not used)
 153   *             x  : Should be set to 0
 154   *          b6
 155   *             0  : None
 156   *             1  : Memory (HAL I2C communication is in Memory Mode)
 157   *          b5
 158   *             0  : None
 159   *             1  : Slave (HAL I2C communication is in Slave Mode)
 160   *          b4
 161   *             0  : None
 162   *             1  : Master (HAL I2C communication is in Master Mode)
 163   *          b3-b2-b1-b0  (not used)
 164   *             xxxx : Should be set to 0000
 165   * @{
 166   */
 167 typedef enum
 168 {
 169   HAL_I2C_MODE_NONE               = 0x00U,   /*!< No I2C communication on going             */
 170   HAL_I2C_MODE_MASTER             = 0x10U,   /*!< I2C communication is in Master Mode       */
 171   HAL_I2C_MODE_SLAVE              = 0x20U,   /*!< I2C communication is in Slave Mode        */
 172   HAL_I2C_MODE_MEM                = 0x40U    /*!< I2C communication is in Memory Mode       */
 173
 174 }HAL_I2C_ModeTypeDef;
 175
 176 /**
 177   * @}
 178   */
 179
 180 /** @defgroup I2C_Error_Code_definition I2C Error Code definition
 181   * @brief  I2C Error Code definition
 182   * @{
 183   */
 184 #define HAL_I2C_ERROR_NONE      ((uint32_t)0x00000000U)    /*!< No error              */
 185 #define HAL_I2C_ERROR_BERR      ((uint32_t)0x00000001U)    /*!< BERR error            */
 186 #define HAL_I2C_ERROR_ARLO      ((uint32_t)0x00000002U)    /*!< ARLO error            */
 187 #define HAL_I2C_ERROR_AF        ((uint32_t)0x00000004U)    /*!< ACKF error            */
 188 #define HAL_I2C_ERROR_OVR       ((uint32_t)0x00000008U)    /*!< OVR error             */
 189 #define HAL_I2C_ERROR_DMA       ((uint32_t)0x00000010U)    /*!< DMA transfer error    */
 190 #define HAL_I2C_ERROR_TIMEOUT   ((uint32_t)0x00000020U)    /*!< Timeout error         */
 191 #define HAL_I2C_ERROR_SIZE      ((uint32_t)0x00000040U)    /*!< Size Management error */
 192 #define HAL_I2C_ERROR_ABORT     ((uint32_t)0x00000080U)    /*!< Abort user request    */
 193 /**
 194   * @}
 195   */
 196
 197 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
 198   * @brief  I2C handle Structure definition
 199   * @{
 200   */
 201 typedef struct __I2C_HandleTypeDef
 202 {
 203   I2C_TypeDef                *Instance;      /*!< I2C registers base address                */
 204
 205   I2C_InitTypeDef            Init;           /*!< I2C communication parameters              */
 206
 207   uint8_t                    *pBuffPtr;      /*!< Pointer to I2C transfer buffer            */
 208
 209   uint16_t                   XferSize;       /*!< I2C transfer size                         */
 210
 211   __IO uint16_t              XferCount;      /*!< I2C transfer counter                      */
 212
 213   __IO uint32_t              XferOptions;    /*!< I2C sequantial transfer options, this parameter can
 214                                                   be a value of @ref I2C_XFEROPTIONS */
 215
 216   __IO uint32_t              PreviousState;  /*!< I2C communication Previous state          */
 217
 218   HAL_StatusTypeDef (*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
 219
 220   DMA_HandleTypeDef          *hdmatx;        /*!< I2C Tx DMA handle parameters              */
 221
 222   DMA_HandleTypeDef          *hdmarx;        /*!< I2C Rx DMA handle parameters              */
 223
 224   HAL_LockTypeDef            Lock;           /*!< I2C locking object                        */
 225
 226   __IO HAL_I2C_StateTypeDef  State;          /*!< I2C communication state                   */
 227
 228   __IO HAL_I2C_ModeTypeDef   Mode;           /*!< I2C communication mode                    */
 229
 230   __IO uint32_t              ErrorCode;      /*!< I2C Error code                            */
 231
 232   __IO uint32_t              AddrEventCount; /*!< I2C Address Event counter                 */
 233 }I2C_HandleTypeDef;
 234 /**
 235   * @}
 236   */
 237
 238 /**
 239   * @}
 240   */
 241 /* Exported constants --------------------------------------------------------*/
 242
 243 /** @defgroup I2C_Exported_Constants I2C Exported Constants
 244   * @{
 245   */
 246
 247 /** @defgroup I2C_XFEROPTIONS  I2C Sequential Transfer Options
 248   * @{
 249   */
 250 #define I2C_NO_OPTION_FRAME             ((uint32_t)0xFFFF0000U)
 251 #define I2C_FIRST_FRAME                 ((uint32_t)I2C_SOFTEND_MODE)
 252 #define I2C_NEXT_FRAME                  ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
 253 #define I2C_FIRST_AND_LAST_FRAME        ((uint32_t)I2C_AUTOEND_MODE)
 254 #define I2C_LAST_FRAME                  ((uint32_t)I2C_AUTOEND_MODE)
 255 /**
 256   * @}
 257   */
 258
 259 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
 260   * @{
 261   */
 262 #define I2C_ADDRESSINGMODE_7BIT         ((uint32_t)0x00000001U)
 263 #define I2C_ADDRESSINGMODE_10BIT        ((uint32_t)0x00000002U)
 264 /**
 265   * @}
 266   */
 267
 268 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
 269   * @{
 270   */
 271 #define I2C_DUALADDRESS_DISABLE         ((uint32_t)0x00000000U)
 272 #define I2C_DUALADDRESS_ENABLE          I2C_OAR2_OA2EN
 273 /**
 274   * @}
 275   */
 276
 277 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
 278   * @{
 279   */
 280 #define I2C_OA2_NOMASK                  ((uint8_t)0x00U)
 281 #define I2C_OA2_MASK01                  ((uint8_t)0x01U)
 282 #define I2C_OA2_MASK02                  ((uint8_t)0x02U)
 283 #define I2C_OA2_MASK03                  ((uint8_t)0x03U)
 284 #define I2C_OA2_MASK04                  ((uint8_t)0x04U)
 285 #define I2C_OA2_MASK05                  ((uint8_t)0x05U)
 286 #define I2C_OA2_MASK06                  ((uint8_t)0x06U)
 287 #define I2C_OA2_MASK07                  ((uint8_t)0x07U)
 288 /**
 289   * @}
 290   */
 291
 292 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
 293   * @{
 294   */
 295 #define I2C_GENERALCALL_DISABLE         ((uint32_t)0x00000000U)
 296 #define I2C_GENERALCALL_ENABLE          I2C_CR1_GCEN
 297 /**
 298   * @}
 299   */
 300
 301 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
 302   * @{
 303   */
 304 #define I2C_NOSTRETCH_DISABLE           ((uint32_t)0x00000000U)
 305 #define I2C_NOSTRETCH_ENABLE            I2C_CR1_NOSTRETCH
 306 /**
 307   * @}
 308   */
 309
 310 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
 311   * @{
 312   */
 313 #define I2C_MEMADD_SIZE_8BIT            ((uint32_t)0x00000001U)
 314 #define I2C_MEMADD_SIZE_16BIT           ((uint32_t)0x00000002U)
 315 /**
 316   * @}
 317   */
 318
 319 /** @defgroup I2C_XferDirection I2C Transfer Direction
 320   * @{
 321   */
 322 #define I2C_DIRECTION_TRANSMIT          ((uint32_t)0x00000000U)
 323 #define I2C_DIRECTION_RECEIVE           ((uint32_t)0x00000001U)
 324 /**
 325   * @}
 326   */
 327
 328 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
 329   * @{
 330   */
 331 #define  I2C_RELOAD_MODE                I2C_CR2_RELOAD
 332 #define  I2C_AUTOEND_MODE               I2C_CR2_AUTOEND
 333 #define  I2C_SOFTEND_MODE               ((uint32_t)0x00000000U)
 334 /**
 335   * @}
 336   */
 337
 338 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
 339   * @{
 340   */
 341 #define  I2C_NO_STARTSTOP               ((uint32_t)0x00000000U)
 342 #define  I2C_GENERATE_STOP              I2C_CR2_STOP
 343 #define  I2C_GENERATE_START_READ        (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
 344 #define  I2C_GENERATE_START_WRITE       I2C_CR2_START
 345 /**
 346   * @}
 347   */
 348
 349 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
 350   * @brief I2C Interrupt definition
 351   *        Elements values convention: 0xXXXXXXXX
 352   *           - XXXXXXXX  : Interrupt control mask
 353   * @{
 354   */
 355 #define I2C_IT_ERRI                     I2C_CR1_ERRIE
 356 #define I2C_IT_TCI                      I2C_CR1_TCIE
 357 #define I2C_IT_STOPI                    I2C_CR1_STOPIE
 358 #define I2C_IT_NACKI                    I2C_CR1_NACKIE
 359 #define I2C_IT_ADDRI                    I2C_CR1_ADDRIE
 360 #define I2C_IT_RXI                      I2C_CR1_RXIE
 361 #define I2C_IT_TXI                      I2C_CR1_TXIE
 362 /**
 363   * @}
 364   */
 365
 366 /** @defgroup I2C_Flag_definition I2C Flag definition
 367   * @{
 368   */
 369 #define I2C_FLAG_TXE                    I2C_ISR_TXE
 370 #define I2C_FLAG_TXIS                   I2C_ISR_TXIS
 371 #define I2C_FLAG_RXNE                   I2C_ISR_RXNE
 372 #define I2C_FLAG_ADDR                   I2C_ISR_ADDR
 373 #define I2C_FLAG_AF                     I2C_ISR_NACKF
 374 #define I2C_FLAG_STOPF                  I2C_ISR_STOPF
 375 #define I2C_FLAG_TC                     I2C_ISR_TC
 376 #define I2C_FLAG_TCR                    I2C_ISR_TCR
 377 #define I2C_FLAG_BERR                   I2C_ISR_BERR
 378 #define I2C_FLAG_ARLO                   I2C_ISR_ARLO
 379 #define I2C_FLAG_OVR                    I2C_ISR_OVR
 380 #define I2C_FLAG_PECERR                 I2C_ISR_PECERR
 381 #define I2C_FLAG_TIMEOUT                I2C_ISR_TIMEOUT
 382 #define I2C_FLAG_ALERT                  I2C_ISR_ALERT
 383 #define I2C_FLAG_BUSY                   I2C_ISR_BUSY
 384 #define I2C_FLAG_DIR                    I2C_ISR_DIR
 385 /**
 386   * @}
 387   */
 388
 389 /**
 390   * @}
 391   */
 392
 393 /* Exported macros -----------------------------------------------------------*/
 394
 395 /** @defgroup I2C_Exported_Macros I2C Exported Macros
 396   * @{
 397   */
 398
 399 /** @brief Reset I2C handle state.
 400   * @param  __HANDLE__ specifies the I2C Handle.
 401   * @retval None
 402   */
 403 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
 404
 405 /** @brief  Enable the specified I2C interrupt.
 406   * @param  __HANDLE__ specifies the I2C Handle.
 407   * @param  __INTERRUPT__ specifies the interrupt source to enable.
 408   *        This parameter can be one of the following values:
 409   *            @arg @ref I2C_IT_ERRI  Errors interrupt enable
 410   *            @arg @ref I2C_IT_TCI   Transfer complete interrupt enable
 411   *            @arg @ref I2C_IT_STOPI STOP detection interrupt enable
 412   *            @arg @ref I2C_IT_NACKI NACK received interrupt enable
 413   *            @arg @ref I2C_IT_ADDRI Address match interrupt enable
 414   *            @arg @ref I2C_IT_RXI   RX interrupt enable
 415   *            @arg @ref I2C_IT_TXI   TX interrupt enable
 416   *
 417   * @retval None
 418   */
 419 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)          ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
 420
 421 /** @brief  Disable the specified I2C interrupt.
 422   * @param  __HANDLE__ specifies the I2C Handle.
 423   * @param  __INTERRUPT__ specifies the interrupt source to disable.
 424   *        This parameter can be one of the following values:
 425   *            @arg @ref I2C_IT_ERRI  Errors interrupt enable
 426   *            @arg @ref I2C_IT_TCI   Transfer complete interrupt enable
 427   *            @arg @ref I2C_IT_STOPI STOP detection interrupt enable
 428   *            @arg @ref I2C_IT_NACKI NACK received interrupt enable
 429   *            @arg @ref I2C_IT_ADDRI Address match interrupt enable
 430   *            @arg @ref I2C_IT_RXI   RX interrupt enable
 431   *            @arg @ref I2C_IT_TXI   TX interrupt enable
 432   *
 433   * @retval None
 434   */
 435 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)         ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
 436
 437 /** @brief  Check whether the specified I2C interrupt source is enabled or not.
 438   * @param  __HANDLE__ specifies the I2C Handle.
 439   * @param  __INTERRUPT__ specifies the I2C interrupt source to check.
 440   *          This parameter can be one of the following values:
 441   *            @arg @ref I2C_IT_ERRI  Errors interrupt enable
 442   *            @arg @ref I2C_IT_TCI   Transfer complete interrupt enable
 443   *            @arg @ref I2C_IT_STOPI STOP detection interrupt enable
 444   *            @arg @ref I2C_IT_NACKI NACK received interrupt enable
 445   *            @arg @ref I2C_IT_ADDRI Address match interrupt enable
 446   *            @arg @ref I2C_IT_RXI   RX interrupt enable
 447   *            @arg @ref I2C_IT_TXI   TX interrupt enable
 448   *
 449   * @retval The new state of __INTERRUPT__ (SET or RESET).
 450   */
 451 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 452
 453 /** @brief  Check whether the specified I2C flag is set or not.
 454   * @param  __HANDLE__ specifies the I2C Handle.
 455   * @param  __FLAG__ specifies the flag to check.
 456   *        This parameter can be one of the following values:
 457   *            @arg @ref I2C_FLAG_TXE     Transmit data register empty
 458   *            @arg @ref I2C_FLAG_TXIS    Transmit interrupt status
 459   *            @arg @ref I2C_FLAG_RXNE    Receive data register not empty
 460   *            @arg @ref I2C_FLAG_ADDR    Address matched (slave mode)
 461   *            @arg @ref I2C_FLAG_AF      Acknowledge failure received flag
 462   *            @arg @ref I2C_FLAG_STOPF   STOP detection flag
 463   *            @arg @ref I2C_FLAG_TC      Transfer complete (master mode)
 464   *            @arg @ref I2C_FLAG_TCR     Transfer complete reload
 465   *            @arg @ref I2C_FLAG_BERR    Bus error
 466   *            @arg @ref I2C_FLAG_ARLO    Arbitration lost
 467   *            @arg @ref I2C_FLAG_OVR     Overrun/Underrun
 468   *            @arg @ref I2C_FLAG_PECERR  PEC error in reception
 469   *            @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
 470   *            @arg @ref I2C_FLAG_ALERT   SMBus alert
 471   *            @arg @ref I2C_FLAG_BUSY    Bus busy
 472   *            @arg @ref I2C_FLAG_DIR     Transfer direction (slave mode)
 473   *
 474   * @retval The new state of __FLAG__ (SET or RESET).
 475   */
 476 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
 477
 478 /** @brief  Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
 479   * @param  __HANDLE__ specifies the I2C Handle.
 480   * @param  __FLAG__ specifies the flag to clear.
 481   *          This parameter can be any combination of the following values:
 482   *            @arg @ref I2C_FLAG_TXE     Transmit data register empty
 483   *            @arg @ref I2C_FLAG_ADDR    Address matched (slave mode)
 484   *            @arg @ref I2C_FLAG_AF      Acknowledge failure received flag
 485   *            @arg @ref I2C_FLAG_STOPF   STOP detection flag
 486   *            @arg @ref I2C_FLAG_BERR    Bus error
 487   *            @arg @ref I2C_FLAG_ARLO    Arbitration lost
 488   *            @arg @ref I2C_FLAG_OVR     Overrun/Underrun
 489   *            @arg @ref I2C_FLAG_PECERR  PEC error in reception
 490   *            @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
 491   *            @arg @ref I2C_FLAG_ALERT   SMBus alert
 492   *
 493   * @retval None
 494   */
 495 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
 496                                                                                  : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
 497
 498 /** @brief  Enable the specified I2C peripheral.
 499   * @param  __HANDLE__ specifies the I2C Handle.
 500   * @retval None
 501   */
 502 #define __HAL_I2C_ENABLE(__HANDLE__)                            (SET_BIT((__HANDLE__)->Instance->CR1,  I2C_CR1_PE))
 503
 504 /** @brief  Disable the specified I2C peripheral.
 505   * @param  __HANDLE__ specifies the I2C Handle.
 506   * @retval None
 507   */
 508 #define __HAL_I2C_DISABLE(__HANDLE__)                           (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
 509
 510 /** @brief  Generate a Non-Acknowledge I2C peripheral in Slave mode.
 511   * @param  __HANDLE__: specifies the I2C Handle.
 512   * @retval None
 513   */
 514 #define __HAL_I2C_GENERATE_NACK(__HANDLE__)                     (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
 515 /**
 516   * @}
 517   */
 518
 519 /* Include I2C HAL Extended module */
 520 #include "stm32f7xx_hal_i2c_ex.h"
 521
 522 /* Exported functions --------------------------------------------------------*/
 523 /** @addtogroup I2C_Exported_Functions
 524   * @{
 525   */
 526
 527 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
 528   * @{
 529   */
 530 /* Initialization and de-initialization functions******************************/
 531 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
 532 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
 533 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
 534 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
 535 /**
 536   * @}
 537   */
 538
 539 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
 540   * @{
 541   */
 542 /* IO operation functions  ****************************************************/
 543  /******* Blocking mode: Polling */
 544 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 545 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 546 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 547 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 548 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 549 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 550 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
 551
 552  /******* Non-Blocking mode: Interrupt */
 553 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
 554 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
 555 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
 556 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
 557 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 558 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 559
 560 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
 561 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
 562 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
 563 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
 564 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
 565 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
 566 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
 567
 568  /******* Non-Blocking mode: DMA */
 569 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
 570 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
 571 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
 572 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
 573 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 574 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
 575 /**
 576   * @}
 577   */
 578
 579 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
 580  * @{
 581  */
 582 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
 583 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
 584 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
 585 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
 586 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
 587 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
 588 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
 589 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
 590 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
 591 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
 592 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
 593 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
 594 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
 595 /**
 596   * @}
 597   */
 598
 599 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
 600   * @{
 601   */
 602 /* Peripheral State, Mode and Error functions  *********************************/
 603 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
 604 HAL_I2C_ModeTypeDef  HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
 605 uint32_t             HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
 606
 607 /**
 608   * @}
 609   */
 610
 611 /**
 612   * @}
 613   */
 614
 615 /* Private constants ---------------------------------------------------------*/
 616 /** @defgroup I2C_Private_Constants I2C Private Constants
 617   * @{
 618   */
 619
 620 /**
 621   * @}
 622   */
 623
 624 /* Private macros ------------------------------------------------------------*/
 625 /** @defgroup I2C_Private_Macro I2C Private Macros
 626   * @{
 627   */
 628
 629 #define IS_I2C_ADDRESSING_MODE(MODE)    (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
 630                                          ((MODE) == I2C_ADDRESSINGMODE_10BIT))
 631
 632 #define IS_I2C_DUAL_ADDRESS(ADDRESS)    (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
 633                                          ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
 634
 635 #define IS_I2C_OWN_ADDRESS2_MASK(MASK)  (((MASK) == I2C_OA2_NOMASK)  || \
 636                                          ((MASK) == I2C_OA2_MASK01) || \
 637                                          ((MASK) == I2C_OA2_MASK02) || \
 638                                          ((MASK) == I2C_OA2_MASK03) || \
 639                                          ((MASK) == I2C_OA2_MASK04) || \
 640                                          ((MASK) == I2C_OA2_MASK05) || \
 641                                          ((MASK) == I2C_OA2_MASK06) || \
 642                                          ((MASK) == I2C_OA2_MASK07))
 643
 644 #define IS_I2C_GENERAL_CALL(CALL)       (((CALL) == I2C_GENERALCALL_DISABLE) || \
 645                                          ((CALL) == I2C_GENERALCALL_ENABLE))
 646
 647 #define IS_I2C_NO_STRETCH(STRETCH)      (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
 648                                          ((STRETCH) == I2C_NOSTRETCH_ENABLE))
 649
 650 #define IS_I2C_MEMADD_SIZE(SIZE)        (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
 651                                          ((SIZE) == I2C_MEMADD_SIZE_16BIT))
 652
 653 #define IS_TRANSFER_MODE(MODE)          (((MODE) == I2C_RELOAD_MODE)   || \
 654                                          ((MODE) == I2C_AUTOEND_MODE) || \
 655                                          ((MODE) == I2C_SOFTEND_MODE))
 656
 657 #define IS_TRANSFER_REQUEST(REQUEST)    (((REQUEST) == I2C_GENERATE_STOP)        || \
 658                                          ((REQUEST) == I2C_GENERATE_START_READ)  || \
 659                                          ((REQUEST) == I2C_GENERATE_START_WRITE) || \
 660                                          ((REQUEST) == I2C_NO_STARTSTOP))
 661
 662 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST)  (((REQUEST) == I2C_FIRST_FRAME)          || \
 663                                                    ((REQUEST) == I2C_NEXT_FRAME)           || \
 664                                                    ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
 665                                                    ((REQUEST) == I2C_LAST_FRAME))
 666
 667 #define I2C_RESET_CR2(__HANDLE__)                 ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
 668
 669 #define I2C_GET_ADDR_MATCH(__HANDLE__)            (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16)
 670 #define I2C_GET_DIR(__HANDLE__)                   (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16)
 671 #define I2C_GET_STOP_MODE(__HANDLE__)             ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
 672 #define I2C_GET_OWN_ADDRESS1(__HANDLE__)          ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
 673 #define I2C_GET_OWN_ADDRESS2(__HANDLE__)          ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
 674
 675 #define IS_I2C_OWN_ADDRESS1(ADDRESS1)             ((ADDRESS1) <= (uint32_t)0x000003FF)
 676 #define IS_I2C_OWN_ADDRESS2(ADDRESS2)             ((ADDRESS2) <= (uint16_t)0x00FF)
 677
 678 #define I2C_MEM_ADD_MSB(__ADDRESS__)              ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8)))
 679 #define I2C_MEM_ADD_LSB(__ADDRESS__)              ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
 680
 681 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
 682                                                           (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
 683 /**
 684   * @}
 685   */
 686
 687 /* Private Functions ---------------------------------------------------------*/
 688 /** @defgroup I2C_Private_Functions I2C Private Functions
 689   * @{
 690   */
 691 /* Private functions are defined in stm32f7xx_hal_i2c.c file */
 692 /**
 693   * @}
 694   */
 695
 696 /**
 697   * @}
 698   */
 699
 700 /**
 701   * @}
 702   */
 703
 704 #ifdef __cplusplus
 705 }
 706 #endif
 707
 708
 709 #endif /* __STM32F7xx_HAL_I2C_H */
 710
 711 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/