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[mTask.git] / int / com / lib / STM32F7xx_HAL_Driver / Inc / stm32f7xx_hal_uart.h
1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_uart.h
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 22-April-2016
7 * @brief Header file of UART HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F7xx_HAL_UART_H
40 #define __STM32F7xx_HAL_UART_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f7xx_hal_def.h"
48
49 /** @addtogroup STM32F7xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup UART
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58 /** @defgroup UART_Exported_Types UART Exported Types
59 * @{
60 */
61
62 /**
63 * @brief UART Init Structure definition
64 */
65 typedef struct
66 {
67 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
68 The baud rate register is computed using the following formula:
69 - If oversampling is 16 or in LIN mode,
70 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
71 - If oversampling is 8,
72 Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
73 Baud Rate Register[3] = 0
74 Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1 */
75
76 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
77 This parameter can be a value of @ref UARTEx_Word_Length */
78
79 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
80 This parameter can be a value of @ref UART_Stop_Bits */
81
82 uint32_t Parity; /*!< Specifies the parity mode.
83 This parameter can be a value of @ref UART_Parity
84 @note When parity is enabled, the computed parity is inserted
85 at the MSB position of the transmitted data (9th bit when
86 the word length is set to 9 data bits; 8th bit when the
87 word length is set to 8 data bits). */
88
89 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
90 This parameter can be a value of @ref UART_Mode */
91
92 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
93 or disabled.
94 This parameter can be a value of @ref UART_Hardware_Flow_Control */
95
96 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
97 This parameter can be a value of @ref UART_Over_Sampling */
98
99 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
100 Selecting the single sample method increases the receiver tolerance to clock
101 deviations. This parameter can be a value of @ref UART_OneBit_Sampling */
102 }UART_InitTypeDef;
103
104 /**
105 * @brief UART Advanced Features initialization structure definition
106 */
107 typedef struct
108 {
109 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
110 Advanced Features may be initialized at the same time .
111 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type */
112
113 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
114 This parameter can be a value of @ref UART_Tx_Inv */
115
116 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
117 This parameter can be a value of @ref UART_Rx_Inv */
118
119 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
120 vs negative/inverted logic).
121 This parameter can be a value of @ref UART_Data_Inv */
122
123 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
124 This parameter can be a value of @ref UART_Rx_Tx_Swap */
125
126 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
127 This parameter can be a value of @ref UART_Overrun_Disable */
128
129 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
130 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error */
131
132 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
133 This parameter can be a value of @ref UART_AutoBaudRate_Enable */
134
135 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
136 detection is carried out.
137 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode */
138
139 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
140 This parameter can be a value of @ref UART_MSB_First */
141 } UART_AdvFeatureInitTypeDef;
142
143
144
145 /**
146 * @brief HAL UART State structures definition
147 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
148 * - gState contains UART state information related to global Handle management
149 * and also information related to Tx operations.
150 * gState value coding follow below described bitmap :
151 * b7-b6 Error information
152 * 00 : No Error
153 * 01 : (Not Used)
154 * 10 : Timeout
155 * 11 : Error
156 * b5 IP initilisation status
157 * 0 : Reset (IP not initialized)
158 * 1 : Init done (IP not initialized. HAL UART Init function already called)
159 * b4-b3 (not used)
160 * xx : Should be set to 00
161 * b2 Intrinsic process state
162 * 0 : Ready
163 * 1 : Busy (IP busy with some configuration or internal operations)
164 * b1 (not used)
165 * x : Should be set to 0
166 * b0 Tx state
167 * 0 : Ready (no Tx operation ongoing)
168 * 1 : Busy (Tx operation ongoing)
169 * - RxState contains information related to Rx operations.
170 * RxState value coding follow below described bitmap :
171 * b7-b6 (not used)
172 * xx : Should be set to 00
173 * b5 IP initilisation status
174 * 0 : Reset (IP not initialized)
175 * 1 : Init done (IP not initialized)
176 * b4-b2 (not used)
177 * xxx : Should be set to 000
178 * b1 Rx state
179 * 0 : Ready (no Rx operation ongoing)
180 * 1 : Busy (Rx operation ongoing)
181 * b0 (not used)
182 * x : Should be set to 0.
183 */
184 typedef enum
185 {
186 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
187 Value is allowed for gState and RxState */
188 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
189 Value is allowed for gState and RxState */
190 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
191 Value is allowed for gState only */
192 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
193 Value is allowed for gState only */
194 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
195 Value is allowed for RxState only */
196 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
197 Not to be used for neither gState nor RxState.
198 Value is result of combination (Or) between gState and RxState values */
199 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
200 Value is allowed for gState only */
201 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
202 Value is allowed for gState only */
203 }HAL_UART_StateTypeDef;
204
205 /**
206 * @brief UART clock sources definition
207 */
208 typedef enum
209 {
210 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
211 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */
212 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
213 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
214 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
215 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
216 }UART_ClockSourceTypeDef;
217
218 /**
219 * @brief UART handle Structure definition
220 */
221 typedef struct
222 {
223 USART_TypeDef *Instance; /*!< UART registers base address */
224
225 UART_InitTypeDef Init; /*!< UART communication parameters */
226
227 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
228
229 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
230
231 uint16_t TxXferSize; /*!< UART Tx Transfer size */
232
233 uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
234
235 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
236
237 uint16_t RxXferSize; /*!< UART Rx Transfer size */
238
239 uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
240
241 uint16_t Mask; /*!< UART Rx RDR register mask */
242
243 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
244
245 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
246
247 HAL_LockTypeDef Lock; /*!< Locking object */
248
249 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
250 and also related to Tx operations.
251 This parameter can be a value of @ref HAL_UART_StateTypeDef */
252
253 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
254 This parameter can be a value of @ref HAL_UART_StateTypeDef */
255
256 __IO uint32_t ErrorCode; /*!< UART Error code */
257
258 }UART_HandleTypeDef;
259
260 /**
261 * @}
262 */
263
264 /* Exported constants --------------------------------------------------------*/
265 /** @defgroup UART_Exported_Constants UART Exported Constants
266 * @{
267 */
268 /** @defgroup UART_Error_Definition UART Error Definition
269 * @{
270 */
271 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
272 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
273 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
274 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< frame error */
275 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
276 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
277 /**
278 * @}
279 */
280 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
281 * @{
282 */
283 #define UART_STOPBITS_1 ((uint32_t)0x00000000U)
284 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
285 /**
286 * @}
287 */
288
289 /** @defgroup UART_Parity UART Parity
290 * @{
291 */
292 #define UART_PARITY_NONE ((uint32_t)0x00000000U)
293 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
294 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
295 /**
296 * @}
297 */
298
299 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
300 * @{
301 */
302 #define UART_HWCONTROL_NONE ((uint32_t)0x00000000U)
303 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
304 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
305 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
306 /**
307 * @}
308 */
309
310 /** @defgroup UART_Mode UART Transfer Mode
311 * @{
312 */
313 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
314 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
315 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
316 /**
317 * @}
318 */
319
320 /** @defgroup UART_State UART State
321 * @{
322 */
323 #define UART_STATE_DISABLE ((uint32_t)0x00000000U)
324 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
325 /**
326 * @}
327 */
328
329 /** @defgroup UART_Over_Sampling UART Over Sampling
330 * @{
331 */
332 #define UART_OVERSAMPLING_16 ((uint32_t)0x00000000U)
333 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
334 /**
335 * @}
336 */
337
338 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
339 * @{
340 */
341 #define UART_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000U)
342 #define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT)
343 /**
344 * @}
345 */
346
347 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
348 * @{
349 */
350 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000U)
351 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0)
352 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1)
353 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE)
354 /**
355 * @}
356 */
357
358 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
359 * @{
360 */
361 #define UART_RECEIVER_TIMEOUT_DISABLE ((uint32_t)0x00000000U)
362 #define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN)
363 /**
364 * @}
365 */
366
367 /** @defgroup UART_LIN UART Local Interconnection Network mode
368 * @{
369 */
370 #define UART_LIN_DISABLE ((uint32_t)0x00000000U)
371 #define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN)
372 /**
373 * @}
374 */
375
376 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
377 * @{
378 */
379 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000U)
380 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
381 /**
382 * @}
383 */
384
385 /** @defgroup UART_DMA_Tx UART DMA Tx
386 * @{
387 */
388 #define UART_DMA_TX_DISABLE ((uint32_t)0x00000000U)
389 #define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
390 /**
391 * @}
392 */
393
394 /** @defgroup UART_DMA_Rx UART DMA Rx
395 * @{
396 */
397 #define UART_DMA_RX_DISABLE ((uint32_t)0x0000U)
398 #define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
399 /**
400 * @}
401 */
402
403 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
404 * @{
405 */
406 #define UART_HALF_DUPLEX_DISABLE ((uint32_t)0x0000U)
407 #define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL)
408 /**
409 * @}
410 */
411
412 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
413 * @{
414 */
415 #define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000U)
416 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
417 /**
418 * @}
419 */
420
421 /** @defgroup UART_Request_Parameters UART Request Parameters
422 * @{
423 */
424 #define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
425 #define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */
426 #define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */
427 #define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
428 #define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
429 /**
430 * @}
431 */
432
433 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
434 * @{
435 */
436 #define UART_ADVFEATURE_NO_INIT ((uint32_t)0x00000000U)
437 #define UART_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001U)
438 #define UART_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002U)
439 #define UART_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004U)
440 #define UART_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008U)
441 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010U)
442 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020U)
443 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT ((uint32_t)0x00000040U)
444 #define UART_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080U)
445 /**
446 * @}
447 */
448
449 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
450 * @{
451 */
452 #define UART_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000U)
453 #define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV)
454 /**
455 * @}
456 */
457
458 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
459 * @{
460 */
461 #define UART_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000U)
462 #define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV)
463 /**
464 * @}
465 */
466
467 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
468 * @{
469 */
470 #define UART_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000U)
471 #define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV)
472 /**
473 * @}
474 */
475
476 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
477 * @{
478 */
479 #define UART_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000U)
480 #define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP)
481 /**
482 * @}
483 */
484
485 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
486 * @{
487 */
488 #define UART_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000U)
489 #define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS)
490 /**
491 * @}
492 */
493
494 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
495 * @{
496 */
497 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE ((uint32_t)0x00000000U)
498 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN)
499 /**
500 * @}
501 */
502
503 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
504 * @{
505 */
506 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000U)
507 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE)
508 /**
509 * @}
510 */
511
512 /** @defgroup UART_MSB_First UART Advanced Feature MSB First
513 * @{
514 */
515 #define UART_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000U)
516 #define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST)
517 /**
518 * @}
519 */
520
521 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
522 * @{
523 */
524 #define UART_ADVFEATURE_MUTEMODE_DISABLE ((uint32_t)0x00000000U)
525 #define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME)
526 /**
527 * @}
528 */
529
530 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
531 * @{
532 */
533 #define UART_CR2_ADDRESS_LSB_POS ((uint32_t) 24U)
534 /**
535 * @}
536 */
537
538 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
539 * @{
540 */
541 #define UART_DE_POLARITY_HIGH ((uint32_t)0x00000000U)
542 #define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP)
543 /**
544 * @}
545 */
546
547 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
548 * @{
549 */
550 #define UART_CR1_DEAT_ADDRESS_LSB_POS ((uint32_t) 21U)
551 /**
552 * @}
553 */
554
555 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
556 * @{
557 */
558 #define UART_CR1_DEDT_ADDRESS_LSB_POS ((uint32_t) 16U)
559 /**
560 * @}
561 */
562
563 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
564 * @{
565 */
566 #define UART_IT_MASK ((uint32_t)0x001FU)
567 /**
568 * @}
569 */
570
571 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
572 * @{
573 */
574 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU
575 /**
576 * @}
577 */
578
579 /** @defgroup UART_Flags UART Status Flags
580 * Elements values convention: 0xXXXX
581 * - 0xXXXX : Flag mask in the ISR register
582 * @{
583 */
584 #define UART_FLAG_TEACK ((uint32_t)0x00200000U)
585 #define UART_FLAG_SBKF ((uint32_t)0x00040000U)
586 #define UART_FLAG_CMF ((uint32_t)0x00020000U)
587 #define UART_FLAG_BUSY ((uint32_t)0x00010000U)
588 #define UART_FLAG_ABRF ((uint32_t)0x00008000U)
589 #define UART_FLAG_ABRE ((uint32_t)0x00004000U)
590 #define UART_FLAG_EOBF ((uint32_t)0x00001000U)
591 #define UART_FLAG_RTOF ((uint32_t)0x00000800U)
592 #define UART_FLAG_CTS ((uint32_t)0x00000400U)
593 #define UART_FLAG_CTSIF ((uint32_t)0x00000200U)
594 #define UART_FLAG_LBDF ((uint32_t)0x00000100U)
595 #define UART_FLAG_TXE ((uint32_t)0x00000080U)
596 #define UART_FLAG_TC ((uint32_t)0x00000040U)
597 #define UART_FLAG_RXNE ((uint32_t)0x00000020U)
598 #define UART_FLAG_IDLE ((uint32_t)0x00000010U)
599 #define UART_FLAG_ORE ((uint32_t)0x00000008U)
600 #define UART_FLAG_NE ((uint32_t)0x00000004U)
601 #define UART_FLAG_FE ((uint32_t)0x00000002U)
602 #define UART_FLAG_PE ((uint32_t)0x00000001U)
603 /**
604 * @}
605 */
606
607 /** @defgroup UART_Interrupt_definition UART Interrupts Definition
608 * Elements values convention: 0000ZZZZ0XXYYYYYb
609 * - YYYYY : Interrupt source position in the XX register (5bits)
610 * - XX : Interrupt source register (2bits)
611 * - 01: CR1 register
612 * - 10: CR2 register
613 * - 11: CR3 register
614 * - ZZZZ : Flag position in the ISR register(4bits)
615 * @{
616 */
617 #define UART_IT_PE ((uint32_t)0x0028U)
618 #define UART_IT_TXE ((uint32_t)0x0727U)
619 #define UART_IT_TC ((uint32_t)0x0626U)
620 #define UART_IT_RXNE ((uint32_t)0x0525U)
621 #define UART_IT_IDLE ((uint32_t)0x0424U)
622 #define UART_IT_LBD ((uint32_t)0x0846U)
623 #define UART_IT_CTS ((uint32_t)0x096AU)
624 #define UART_IT_CM ((uint32_t)0x112EU)
625
626 /** Elements values convention: 000000000XXYYYYYb
627 * - YYYYY : Interrupt source position in the XX register (5bits)
628 * - XX : Interrupt source register (2bits)
629 * - 01: CR1 register
630 * - 10: CR2 register
631 * - 11: CR3 register
632 */
633 #define UART_IT_ERR ((uint32_t)0x0060U)
634
635 /** Elements values convention: 0000ZZZZ00000000b
636 * - ZZZZ : Flag position in the ISR register(4bits)
637 */
638 #define UART_IT_ORE ((uint32_t)0x0300U)
639 #define UART_IT_NE ((uint32_t)0x0200U)
640 #define UART_IT_FE ((uint32_t)0x0100U)
641 /**
642 * @}
643 */
644
645 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
646 * @{
647 */
648 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
649 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
650 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
651 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
652 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
653 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
654 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
655 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
656 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */
657 #define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */
658 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
659 /**
660 * @}
661 */
662
663
664 /**
665 * @}
666 */
667
668 /* Exported macros -----------------------------------------------------------*/
669 /** @defgroup UART_Exported_Macros UART Exported Macros
670 * @{
671 */
672
673 /** @brief Reset UART handle state
674 * @param __HANDLE__: UART handle.
675 * @retval None
676 */
677 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
678 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
679 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
680 } while(0)
681
682 /** @brief Flush the UART Data registers
683 * @param __HANDLE__: specifies the UART Handle.
684 */
685 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
686 do{ \
687 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
688 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
689 } while(0)
690
691 /** @brief Clears the specified UART ISR flag, in setting the proper ICR register flag.
692 * @param __HANDLE__: specifies the UART Handle.
693 * @param __FLAG__: specifies the interrupt clear register flag that needs to be set
694 * to clear the corresponding interrupt
695 * This parameter can be one of the following values:
696 * @arg UART_CLEAR_PEF: Parity Error Clear Flag
697 * @arg UART_CLEAR_FEF: Framing Error Clear Flag
698 * @arg UART_CLEAR_NEF: Noise detected Clear Flag
699 * @arg UART_CLEAR_OREF: OverRun Error Clear Flag
700 * @arg UART_CLEAR_IDLEF: IDLE line detected Clear Flag
701 * @arg UART_CLEAR_TCF: Transmission Complete Clear Flag
702 * @arg UART_CLEAR_LBDF: LIN Break Detection Clear Flag
703 * @arg UART_CLEAR_CTSF: CTS Interrupt Clear Flag
704 * @arg UART_CLEAR_RTOF: Receiver Time Out Clear Flag
705 * @arg UART_CLEAR_EOBF: End Of Block Clear Flag
706 * @arg UART_CLEAR_CMF: Character Match Clear Flag
707 * @retval None
708 */
709 #define __HAL_UART_CLEAR_IT(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__FLAG__))
710
711 /** @brief Clear the UART PE pending flag.
712 * @param __HANDLE__: specifies the UART Handle.
713 * @retval None
714 */
715 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_PEF)
716
717 /** @brief Clear the UART FE pending flag.
718 * @param __HANDLE__: specifies the UART Handle.
719 * @retval None
720 */
721 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_FEF)
722
723 /** @brief Clear the UART NE pending flag.
724 * @param __HANDLE__: specifies the UART Handle.
725 * @retval None
726 */
727 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_NEF)
728
729 /** @brief Clear the UART ORE pending flag.
730 * @param __HANDLE__: specifies the UART Handle.
731 * @retval None
732 */
733 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_OREF)
734
735 /** @brief Clear the UART IDLE pending flag.
736 * @param __HANDLE__: specifies the UART Handle.
737 * @retval None
738 */
739 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_IT((__HANDLE__),UART_CLEAR_IDLEF)
740
741 /** @brief Checks whether the specified UART flag is set or not.
742 * @param __HANDLE__: specifies the UART Handle.
743 * @param __FLAG__: specifies the flag to check.
744 * This parameter can be one of the following values:
745 * @arg UART_FLAG_REACK: Receive enable acknowledge flag
746 * @arg UART_FLAG_TEACK: Transmit enable acknowledge flag
747 * @arg UART_FLAG_WUF: Wake up from stop mode flag
748 * @arg UART_FLAG_RWU: Receiver wake up flag (is the UART in mute mode)
749 * @arg UART_FLAG_SBKF: Send Break flag
750 * @arg UART_FLAG_CMF: Character match flag
751 * @arg UART_FLAG_BUSY: Busy flag
752 * @arg UART_FLAG_ABRF: Auto Baud rate detection flag
753 * @arg UART_FLAG_ABRE: Auto Baud rate detection error flag
754 * @arg UART_FLAG_EOBF: End of block flag
755 * @arg UART_FLAG_RTOF: Receiver timeout flag
756 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
757 * @arg UART_FLAG_LBD: LIN Break detection flag
758 * @arg UART_FLAG_TXE: Transmit data register empty flag
759 * @arg UART_FLAG_TC: Transmission Complete flag
760 * @arg UART_FLAG_RXNE: Receive data register not empty flag
761 * @arg UART_FLAG_IDLE: Idle Line detection flag
762 * @arg UART_FLAG_ORE: OverRun Error flag
763 * @arg UART_FLAG_NE: Noise Error flag
764 * @arg UART_FLAG_FE: Framing Error flag
765 * @arg UART_FLAG_PE: Parity Error flag
766 * @retval The new state of __FLAG__ (TRUE or FALSE).
767 */
768 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
769
770 /** @brief Enables the specified UART interrupt.
771 * @param __HANDLE__: specifies the UART Handle.
772 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
773 * This parameter can be one of the following values:
774 * @arg UART_IT_WUF: Wakeup from stop mode interrupt
775 * @arg UART_IT_CM: Character match interrupt
776 * @arg UART_IT_CTS: CTS change interrupt
777 * @arg UART_IT_LBD: LIN Break detection interrupt
778 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
779 * @arg UART_IT_TC: Transmission complete interrupt
780 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
781 * @arg UART_IT_IDLE: Idle line detection interrupt
782 * @arg UART_IT_PE: Parity Error interrupt
783 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
784 * @retval None
785 */
786 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
787 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
788 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
789
790
791 /** @brief Disables the specified UART interrupt.
792 * @param __HANDLE__: specifies the UART Handle.
793 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
794 * This parameter can be one of the following values:
795 * @arg UART_IT_CM: Character match interrupt
796 * @arg UART_IT_CTS: CTS change interrupt
797 * @arg UART_IT_LBD: LIN Break detection interrupt
798 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
799 * @arg UART_IT_TC: Transmission complete interrupt
800 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
801 * @arg UART_IT_IDLE: Idle line detection interrupt
802 * @arg UART_IT_PE: Parity Error interrupt
803 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
804 * @retval None
805 */
806 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
807 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
808 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
809
810 /** @brief Checks whether the specified UART interrupt has occurred or not.
811 * @param __HANDLE__: specifies the UART Handle.
812 * @param __IT__: specifies the UART interrupt to check.
813 * This parameter can be one of the following values:
814 * @arg UART_IT_CM: Character match interrupt
815 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
816 * @arg UART_IT_LBD: LIN Break detection interrupt
817 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
818 * @arg UART_IT_TC: Transmission complete interrupt
819 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
820 * @arg UART_IT_IDLE: Idle line detection interrupt
821 * @arg UART_IT_ORE: OverRun Error interrupt
822 * @arg UART_IT_NE: Noise Error interrupt
823 * @arg UART_IT_FE: Framing Error interrupt
824 * @arg UART_IT_PE: Parity Error interrupt
825 * @retval The new state of __IT__ (TRUE or FALSE).
826 */
827 #define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08)))
828
829 /** @brief Checks whether the specified UART interrupt source is enabled.
830 * @param __HANDLE__: specifies the UART Handle.
831 * @param __IT__: specifies the UART interrupt source to check.
832 * This parameter can be one of the following values:
833 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
834 * @arg UART_IT_LBD: LIN Break detection interrupt
835 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
836 * @arg UART_IT_TC: Transmission complete interrupt
837 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
838 * @arg UART_IT_IDLE: Idle line detection interrupt
839 * @arg UART_IT_ORE: OverRun Error interrupt
840 * @arg UART_IT_NE: Noise Error interrupt
841 * @arg UART_IT_FE: Framing Error interrupt
842 * @arg UART_IT_PE: Parity Error interrupt
843 * @retval The new state of __IT__ (TRUE or FALSE).
844 */
845 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2)? \
846 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & UART_IT_MASK)))
847
848 /** @brief Set a specific UART request flag.
849 * @param __HANDLE__: specifies the UART Handle.
850 * @param __REQ__: specifies the request flag to set
851 * This parameter can be one of the following values:
852 * @arg UART_AUTOBAUD_REQUEST: Auto-Baud Rate Request
853 * @arg UART_SENDBREAK_REQUEST: Send Break Request
854 * @arg UART_MUTE_MODE_REQUEST: Mute Mode Request
855 * @arg UART_RXDATA_FLUSH_REQUEST: Receive Data flush Request
856 * @arg UART_TXDATA_FLUSH_REQUEST: Transmit data flush Request
857 * @retval None
858 */
859 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__))
860
861 /** @brief Enables the UART one bit sample method
862 * @param __HANDLE__: specifies the UART Handle.
863 * @retval None
864 */
865 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
866
867 /** @brief Disables the UART one bit sample method
868 * @param __HANDLE__: specifies the UART Handle.
869 * @retval None
870 */
871 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
872
873 /** @brief Enable UART
874 * @param __HANDLE__: specifies the UART Handle.
875 * @retval None
876 */
877 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
878
879 /** @brief Disable UART
880 * @param __HANDLE__: specifies the UART Handle.
881 * @retval None
882 */
883 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
884
885 /** @brief Enable CTS flow control
886 * This macro allows to enable CTS hardware flow control for a given UART instance,
887 * without need to call HAL_UART_Init() function.
888 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
889 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
890 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
891 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
892 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
893 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
894 * @param __HANDLE__: specifies the UART Handle.
895 * The Handle Instance can be USART1, USART2 or LPUART.
896 * @retval None
897 */
898 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
899 do{ \
900 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
901 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
902 } while(0)
903
904 /** @brief Disable CTS flow control
905 * This macro allows to disable CTS hardware flow control for a given UART instance,
906 * without need to call HAL_UART_Init() function.
907 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
908 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
909 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
910 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
911 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
912 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
913 * @param __HANDLE__: specifies the UART Handle.
914 * The Handle Instance can be USART1, USART2 or LPUART.
915 * @retval None
916 */
917 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
918 do{ \
919 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
920 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
921 } while(0)
922
923 /** @brief Enable RTS flow control
924 * This macro allows to enable RTS hardware flow control for a given UART instance,
925 * without need to call HAL_UART_Init() function.
926 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
927 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
928 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
929 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
930 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
931 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
932 * @param __HANDLE__: specifies the UART Handle.
933 * The Handle Instance can be USART1, USART2 or LPUART.
934 * @retval None
935 */
936 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
937 do{ \
938 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
939 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
940 } while(0)
941
942 /** @brief Disable RTS flow control
943 * This macro allows to disable RTS hardware flow control for a given UART instance,
944 * without need to call HAL_UART_Init() function.
945 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
946 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
947 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
948 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
949 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
950 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
951 * @param __HANDLE__: specifies the UART Handle.
952 * The Handle Instance can be USART1, USART2 or LPUART.
953 * @retval None
954 */
955 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
956 do{ \
957 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
958 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
959 } while(0)
960
961 /**
962 * @}
963 */
964
965 /* Private macros --------------------------------------------------------*/
966 /** @defgroup UART_Private_Macros UART Private Macros
967 * @{
968 */
969 /** @brief BRR division operation to set BRR register with LPUART
970 * @param _PCLK_: LPUART clock
971 * @param _BAUD_: Baud rate set by the user
972 * @retval Division result
973 */
974 #define UART_DIV_LPUART(_PCLK_, _BAUD_) ((((_PCLK_)*256)+((_BAUD_)/2))/((_BAUD_)))
975
976 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode
977 * @param _PCLK_: UART clock
978 * @param _BAUD_: Baud rate set by the user
979 * @retval Division result
980 */
981 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) ((((_PCLK_)*2)+((_BAUD_)/2))/((_BAUD_)))
982
983 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode
984 * @param _PCLK_: UART clock
985 * @param _BAUD_: Baud rate set by the user
986 * @retval Division result
987 */
988 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) ((((_PCLK_))+((_BAUD_)/2))/((_BAUD_)))
989
990 /** @brief Check UART Baud rate
991 * @param BAUDRATE: Baudrate specified by the user
992 * The maximum Baud Rate is derived from the maximum clock on F7 (i.e. 216 MHz)
993 * divided by the smallest oversampling used on the USART (i.e. 8)
994 * @retval Test result (TRUE or FALSE).
995 */
996 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 9000001)
997
998 /** @brief Check UART assertion time
999 * @param TIME: 5-bit value assertion time
1000 * @retval Test result (TRUE or FALSE).
1001 */
1002 #define IS_UART_ASSERTIONTIME(TIME) ((TIME) <= 0x1F)
1003
1004 /** @brief Check UART deassertion time
1005 * @param TIME: 5-bit value deassertion time
1006 * @retval Test result (TRUE or FALSE).
1007 */
1008 #define IS_UART_DEASSERTIONTIME(TIME) ((TIME) <= 0x1F)
1009
1010 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
1011 ((STOPBITS) == UART_STOPBITS_2))
1012
1013 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
1014 ((PARITY) == UART_PARITY_EVEN) || \
1015 ((PARITY) == UART_PARITY_ODD))
1016
1017 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
1018 (((CONTROL) == UART_HWCONTROL_NONE) || \
1019 ((CONTROL) == UART_HWCONTROL_RTS) || \
1020 ((CONTROL) == UART_HWCONTROL_CTS) || \
1021 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
1022
1023 #define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)(UART_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
1024
1025 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
1026 ((STATE) == UART_STATE_ENABLE))
1027
1028 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
1029 ((SAMPLING) == UART_OVERSAMPLING_8))
1030
1031 #define IS_UART_ONE_BIT_SAMPLE(ONEBIT) (((ONEBIT) == UART_ONE_BIT_SAMPLE_DISABLE) || \
1032 ((ONEBIT) == UART_ONE_BIT_SAMPLE_ENABLE))
1033
1034 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
1035 ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
1036 ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
1037 ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
1038
1039 #define IS_UART_RECEIVER_TIMEOUT(TIMEOUT) (((TIMEOUT) == UART_RECEIVER_TIMEOUT_DISABLE) || \
1040 ((TIMEOUT) == UART_RECEIVER_TIMEOUT_ENABLE))
1041
1042 #define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) || \
1043 ((LIN) == UART_LIN_ENABLE))
1044
1045 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
1046 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
1047
1048 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
1049 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
1050
1051 #define IS_UART_DMA_TX(DMATX) (((DMATX) == UART_DMA_TX_DISABLE) || \
1052 ((DMATX) == UART_DMA_TX_ENABLE))
1053
1054 #define IS_UART_DMA_RX(DMARX) (((DMARX) == UART_DMA_RX_DISABLE) || \
1055 ((DMARX) == UART_DMA_RX_ENABLE))
1056
1057 #define IS_UART_HALF_DUPLEX(HDSEL) (((HDSEL) == UART_HALF_DUPLEX_DISABLE) || \
1058 ((HDSEL) == UART_HALF_DUPLEX_ENABLE))
1059
1060 #define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) || \
1061 ((PARAM) == UART_SENDBREAK_REQUEST) || \
1062 ((PARAM) == UART_MUTE_MODE_REQUEST) || \
1063 ((PARAM) == UART_RXDATA_FLUSH_REQUEST) || \
1064 ((PARAM) == UART_TXDATA_FLUSH_REQUEST))
1065
1066 #define IS_UART_ADVFEATURE_INIT(INIT) ((INIT) <= (UART_ADVFEATURE_NO_INIT | \
1067 UART_ADVFEATURE_TXINVERT_INIT | \
1068 UART_ADVFEATURE_RXINVERT_INIT | \
1069 UART_ADVFEATURE_DATAINVERT_INIT | \
1070 UART_ADVFEATURE_SWAP_INIT | \
1071 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
1072 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
1073 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
1074 UART_ADVFEATURE_MSBFIRST_INIT))
1075
1076 #define IS_UART_ADVFEATURE_TXINV(TXINV) (((TXINV) == UART_ADVFEATURE_TXINV_DISABLE) || \
1077 ((TXINV) == UART_ADVFEATURE_TXINV_ENABLE))
1078
1079 #define IS_UART_ADVFEATURE_RXINV(RXINV) (((RXINV) == UART_ADVFEATURE_RXINV_DISABLE) || \
1080 ((RXINV) == UART_ADVFEATURE_RXINV_ENABLE))
1081
1082 #define IS_UART_ADVFEATURE_DATAINV(DATAINV) (((DATAINV) == UART_ADVFEATURE_DATAINV_DISABLE) || \
1083 ((DATAINV) == UART_ADVFEATURE_DATAINV_ENABLE))
1084
1085 #define IS_UART_ADVFEATURE_SWAP(SWAP) (((SWAP) == UART_ADVFEATURE_SWAP_DISABLE) || \
1086 ((SWAP) == UART_ADVFEATURE_SWAP_ENABLE))
1087
1088 #define IS_UART_OVERRUN(OVERRUN) (((OVERRUN) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
1089 ((OVERRUN) == UART_ADVFEATURE_OVERRUN_DISABLE))
1090
1091 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(AUTOBAUDRATE) (((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
1092 ((AUTOBAUDRATE) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
1093
1094 #define IS_UART_ADVFEATURE_DMAONRXERROR(DMA) (((DMA) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
1095 ((DMA) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
1096
1097 #define IS_UART_ADVFEATURE_MSBFIRST(MSBFIRST) (((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
1098 ((MSBFIRST) == UART_ADVFEATURE_MSBFIRST_ENABLE))
1099
1100 #define IS_UART_MUTE_MODE(MUTE) (((MUTE) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
1101 ((MUTE) == UART_ADVFEATURE_MUTEMODE_ENABLE))
1102
1103 #define IS_UART_DE_POLARITY(POLARITY) (((POLARITY) == UART_DE_POLARITY_HIGH) || \
1104 ((POLARITY) == UART_DE_POLARITY_LOW))
1105
1106 /**
1107 * @}
1108 */
1109 /* Include UART HAL Extension module */
1110 #include "stm32f7xx_hal_uart_ex.h"
1111 /* Exported functions --------------------------------------------------------*/
1112 /** @addtogroup UART_Exported_Functions UART Exported Functions
1113 * @{
1114 */
1115
1116 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
1117 * @{
1118 */
1119
1120 /* Initialization and de-initialization functions ****************************/
1121 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
1122 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
1123 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
1124 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
1125 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
1126 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
1127 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
1128 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
1129
1130 /**
1131 * @}
1132 */
1133
1134 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
1135 * @{
1136 */
1137
1138 /* IO operation functions *****************************************************/
1139 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1140 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1141 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1142 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1143 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1144 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1145 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
1146 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
1147 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
1148
1149 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
1150 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
1151 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
1152 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
1153 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
1154 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
1155
1156 /**
1157 * @}
1158 */
1159
1160 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
1161 * @{
1162 */
1163
1164 /* Peripheral Control functions ************************************************/
1165 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
1166 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
1167 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
1168 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
1169 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
1170 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
1171 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
1172
1173 /**
1174 * @}
1175 */
1176
1177 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
1178 * @{
1179 */
1180
1181 /* Peripheral State and Errors functions **************************************************/
1182 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
1183 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
1184
1185 /**
1186 * @}
1187 */
1188
1189 /**
1190 * @}
1191 */
1192
1193 /* Private functions -----------------------------------------------------------*/
1194 /** @addtogroup UART_Private_Functions UART Private Functions
1195 * @{
1196 */
1197
1198 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
1199 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
1200 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
1201 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
1202
1203 /**
1204 * @}
1205 */
1206
1207 /**
1208 * @}
1209 */
1210
1211 /**
1212 * @}
1213 */
1214
1215 #ifdef __cplusplus
1216 }
1217 #endif
1218
1219 #endif /* __STM32F7xx_HAL_UART_H */
1220
1221 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Repo containing the code for the mTask system (see msc-thesis1617)