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[mTask.git] / int / com / lib / STM32F7xx_HAL_Driver / Src / stm32f7xx_hal_can.c
1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_can.c
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 22-April-2016
7 * @brief CAN HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Controller Area Network (CAN) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State and Error functions
14 *
15 @verbatim
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
19 [..]
20 (#) Enable the CAN controller interface clock using
21 __HAL_RCC_CAN1_CLK_ENABLE() for CAN1, __HAL_RCC_CAN2_CLK_ENABLE() for CAN2
22 and __HAL_RCC_CAN3_CLK_ENABLE() for CAN3
23 -@- In case you are using CAN2 only, you have to enable the CAN1 clock.
24
25 (#) CAN pins configuration
26 (++) Enable the clock for the CAN GPIOs using the following function:
27 __HAL_RCC_GPIOx_CLK_ENABLE()
28 (++) Connect and configure the involved CAN pins to AF9 using the
29 following function HAL_GPIO_Init()
30
31 (#) Initialize and configure the CAN using HAL_CAN_Init() function.
32
33 (#) Transmit the desired CAN frame using HAL_CAN_Transmit() function.
34
35 (#) Or transmit the desired CAN frame using HAL_CAN_Transmit_IT() function.
36
37 (#) Receive a CAN frame using HAL_CAN_Receive() function.
38
39 (#) Or receive a CAN frame using HAL_CAN_Receive_IT() function.
40
41 *** Polling mode IO operation ***
42 =================================
43 [..]
44 (+) Start the CAN peripheral transmission and wait the end of this operation
45 using HAL_CAN_Transmit(), at this stage user can specify the value of timeout
46 according to his end application
47 (+) Start the CAN peripheral reception and wait the end of this operation
48 using HAL_CAN_Receive(), at this stage user can specify the value of timeout
49 according to his end application
50
51 *** Interrupt mode IO operation ***
52 ===================================
53 [..]
54 (+) Start the CAN peripheral transmission using HAL_CAN_Transmit_IT()
55 (+) Start the CAN peripheral reception using HAL_CAN_Receive_IT()
56 (+) Use HAL_CAN_IRQHandler() called under the used CAN Interrupt subroutine
57 (+) At CAN end of transmission HAL_CAN_TxCpltCallback() function is executed and user can
58 add his own code by customization of function pointer HAL_CAN_TxCpltCallback
59 (+) In case of CAN Error, HAL_CAN_ErrorCallback() function is executed and user can
60 add his own code by customization of function pointer HAL_CAN_ErrorCallback
61
62 *** CAN HAL driver macros list ***
63 =============================================
64 [..]
65 Below the list of most used macros in CAN HAL driver.
66
67 (+) __HAL_CAN_ENABLE_IT: Enable the specified CAN interrupts
68 (+) __HAL_CAN_DISABLE_IT: Disable the specified CAN interrupts
69 (+) __HAL_CAN_GET_IT_SOURCE: Check if the specified CAN interrupt source is enabled or disabled
70 (+) __HAL_CAN_CLEAR_FLAG: Clear the CAN's pending flags
71 (+) __HAL_CAN_GET_FLAG: Get the selected CAN's flag status
72
73 [..]
74 (@) You can refer to the CAN HAL driver header file for more useful macros
75
76 @endverbatim
77
78 ******************************************************************************
79 * @attention
80 *
81 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
82 *
83 * Redistribution and use in source and binary forms, with or without modification,
84 * are permitted provided that the following conditions are met:
85 * 1. Redistributions of source code must retain the above copyright notice,
86 * this list of conditions and the following disclaimer.
87 * 2. Redistributions in binary form must reproduce the above copyright notice,
88 * this list of conditions and the following disclaimer in the documentation
89 * and/or other materials provided with the distribution.
90 * 3. Neither the name of STMicroelectronics nor the names of its contributors
91 * may be used to endorse or promote products derived from this software
92 * without specific prior written permission.
93 *
94 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
95 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
96 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
97 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
98 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
99 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
100 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
101 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
102 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
103 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
104 *
105 ******************************************************************************
106 */
107
108 /* Includes ------------------------------------------------------------------*/
109 #include "stm32f7xx_hal.h"
110
111 /** @addtogroup STM32F7xx_HAL_Driver
112 * @{
113 */
114
115 /** @defgroup CAN CAN
116 * @brief CAN driver modules
117 * @{
118 */
119
120 #ifdef HAL_CAN_MODULE_ENABLED
121
122
123 /* Private typedef -----------------------------------------------------------*/
124 /* Private define ------------------------------------------------------------*/
125 /** @addtogroup CAN_Private_Constants
126 * @{
127 */
128 #define CAN_TIMEOUT_VALUE 10
129 /**
130 * @}
131 */
132 /* Private macro -------------------------------------------------------------*/
133 /* Private variables ---------------------------------------------------------*/
134 /* Private function prototypes -----------------------------------------------*/
135 /** @addtogroup CAN_Private_Functions
136 * @{
137 */
138 static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber);
139 static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan);
140 /**
141 * @}
142 */
143
144 /* Exported functions --------------------------------------------------------*/
145 /** @defgroup CAN_Exported_Functions CAN Exported Functions
146 * @{
147 */
148
149 /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
150 * @brief Initialization and Configuration functions
151 *
152 @verbatim
153 ==============================================================================
154 ##### Initialization and de-initialization functions #####
155 ==============================================================================
156 [..] This section provides functions allowing to:
157 (+) Initialize and configure the CAN.
158 (+) De-initialize the CAN.
159
160 @endverbatim
161 * @{
162 */
163
164 /**
165 * @brief Initializes the CAN peripheral according to the specified
166 * parameters in the CAN_InitStruct.
167 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
168 * the configuration information for the specified CAN.
169 * @retval HAL status
170 */
171 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
172 {
173 uint32_t InitStatus = CAN_INITSTATUS_FAILED;
174 uint32_t tickstart = 0;
175
176 /* Check CAN handle */
177 if(hcan == NULL)
178 {
179 return HAL_ERROR;
180 }
181
182 /* Check the parameters */
183 assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
184 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TTCM));
185 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ABOM));
186 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AWUM));
187 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.NART));
188 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.RFLM));
189 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TXFP));
190 assert_param(IS_CAN_MODE(hcan->Init.Mode));
191 assert_param(IS_CAN_SJW(hcan->Init.SJW));
192 assert_param(IS_CAN_BS1(hcan->Init.BS1));
193 assert_param(IS_CAN_BS2(hcan->Init.BS2));
194 assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler));
195
196
197 if(hcan->State == HAL_CAN_STATE_RESET)
198 {
199 /* Allocate lock resource and initialize it */
200 hcan->Lock = HAL_UNLOCKED;
201 /* Init the low level hardware */
202 HAL_CAN_MspInit(hcan);
203 }
204
205 /* Initialize the CAN state*/
206 hcan->State = HAL_CAN_STATE_BUSY;
207
208 /* Exit from sleep mode */
209 hcan->Instance->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
210
211 /* Request initialisation */
212 hcan->Instance->MCR |= CAN_MCR_INRQ ;
213
214 /* Get tick */
215 tickstart = HAL_GetTick();
216
217 /* Wait the acknowledge */
218 while((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
219 {
220 if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
221 {
222 hcan->State= HAL_CAN_STATE_TIMEOUT;
223 /* Process unlocked */
224 __HAL_UNLOCK(hcan);
225 return HAL_TIMEOUT;
226 }
227 }
228
229 /* Check acknowledge */
230 if ((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
231 {
232 /* Set the time triggered communication mode */
233 if (hcan->Init.TTCM == ENABLE)
234 {
235 hcan->Instance->MCR |= CAN_MCR_TTCM;
236 }
237 else
238 {
239 hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TTCM;
240 }
241
242 /* Set the automatic bus-off management */
243 if (hcan->Init.ABOM == ENABLE)
244 {
245 hcan->Instance->MCR |= CAN_MCR_ABOM;
246 }
247 else
248 {
249 hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_ABOM;
250 }
251
252 /* Set the automatic wake-up mode */
253 if (hcan->Init.AWUM == ENABLE)
254 {
255 hcan->Instance->MCR |= CAN_MCR_AWUM;
256 }
257 else
258 {
259 hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_AWUM;
260 }
261
262 /* Set the no automatic retransmission */
263 if (hcan->Init.NART == ENABLE)
264 {
265 hcan->Instance->MCR |= CAN_MCR_NART;
266 }
267 else
268 {
269 hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_NART;
270 }
271
272 /* Set the receive FIFO locked mode */
273 if (hcan->Init.RFLM == ENABLE)
274 {
275 hcan->Instance->MCR |= CAN_MCR_RFLM;
276 }
277 else
278 {
279 hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_RFLM;
280 }
281
282 /* Set the transmit FIFO priority */
283 if (hcan->Init.TXFP == ENABLE)
284 {
285 hcan->Instance->MCR |= CAN_MCR_TXFP;
286 }
287 else
288 {
289 hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TXFP;
290 }
291
292 /* Set the bit timing register */
293 hcan->Instance->BTR = (uint32_t)((uint32_t)hcan->Init.Mode) | \
294 ((uint32_t)hcan->Init.SJW) | \
295 ((uint32_t)hcan->Init.BS1) | \
296 ((uint32_t)hcan->Init.BS2) | \
297 ((uint32_t)hcan->Init.Prescaler - 1);
298
299 /* Request leave initialisation */
300 hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_INRQ;
301
302 /* Get tick */
303 tickstart = HAL_GetTick();
304
305 /* Wait the acknowledge */
306 while((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
307 {
308 if((HAL_GetTick() - tickstart ) > CAN_TIMEOUT_VALUE)
309 {
310 hcan->State= HAL_CAN_STATE_TIMEOUT;
311 /* Process unlocked */
312 __HAL_UNLOCK(hcan);
313 return HAL_TIMEOUT;
314 }
315 }
316
317 /* Check acknowledged */
318 if ((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
319 {
320 InitStatus = CAN_INITSTATUS_SUCCESS;
321 }
322 }
323
324 if(InitStatus == CAN_INITSTATUS_SUCCESS)
325 {
326 /* Set CAN error code to none */
327 hcan->ErrorCode = HAL_CAN_ERROR_NONE;
328
329 /* Initialize the CAN state */
330 hcan->State = HAL_CAN_STATE_READY;
331
332 /* Return function status */
333 return HAL_OK;
334 }
335 else
336 {
337 /* Initialize the CAN state */
338 hcan->State = HAL_CAN_STATE_ERROR;
339
340 /* Return function status */
341 return HAL_ERROR;
342 }
343 }
344
345 /**
346 * @brief Configures the CAN reception filter according to the specified
347 * parameters in the CAN_FilterInitStruct.
348 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
349 * the configuration information for the specified CAN.
350 * @param sFilterConfig: pointer to a CAN_FilterConfTypeDef structure that
351 * contains the filter configuration information.
352 * @retval None
353 */
354 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig)
355 {
356 uint32_t filternbrbitpos = 0;
357 CAN_TypeDef *can_ip;
358
359 /* Check the parameters */
360 assert_param(IS_CAN_FILTER_NUMBER(sFilterConfig->FilterNumber));
361 assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode));
362 assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale));
363 assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment));
364 assert_param(IS_FUNCTIONAL_STATE(sFilterConfig->FilterActivation));
365 assert_param(IS_CAN_BANKNUMBER(sFilterConfig->BankNumber));
366
367 filternbrbitpos = ((uint32_t)1) << sFilterConfig->FilterNumber;
368 #if defined (CAN3)
369 /* Check the CAN instance */
370 if(hcan->Instance == CAN3)
371 {
372 can_ip = CAN3;
373 }
374 else
375 {
376 can_ip = CAN1;
377 }
378 #else
379 can_ip = CAN1;
380 #endif
381
382 /* Initialisation mode for the filter */
383 can_ip->FMR |= (uint32_t)CAN_FMR_FINIT;
384
385 /* Select the start slave bank */
386 can_ip->FMR &= ~((uint32_t)CAN_FMR_CAN2SB);
387 can_ip->FMR |= (uint32_t)(sFilterConfig->BankNumber << 8);
388
389 /* Filter Deactivation */
390 can_ip->FA1R &= ~(uint32_t)filternbrbitpos;
391
392 /* Filter Scale */
393 if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT)
394 {
395 /* 16-bit scale for the filter */
396 can_ip->FS1R &= ~(uint32_t)filternbrbitpos;
397
398 /* First 16-bit identifier and First 16-bit mask */
399 /* Or First 16-bit identifier and Second 16-bit identifier */
400 can_ip->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
401 ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16) |
402 (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);
403
404 /* Second 16-bit identifier and Second 16-bit mask */
405 /* Or Third 16-bit identifier and Fourth 16-bit identifier */
406 can_ip->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
407 ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |
408 (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh);
409 }
410
411 if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT)
412 {
413 /* 32-bit scale for the filter */
414 can_ip->FS1R |= filternbrbitpos;
415
416 /* 32-bit identifier or First 32-bit identifier */
417 can_ip->sFilterRegister[sFilterConfig->FilterNumber].FR1 =
418 ((0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh) << 16) |
419 (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow);
420
421 /* 32-bit mask or Second 32-bit identifier */
422 can_ip->sFilterRegister[sFilterConfig->FilterNumber].FR2 =
423 ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) |
424 (0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow);
425 }
426
427 /* Filter Mode */
428 if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK)
429 {
430 /*Id/Mask mode for the filter*/
431 can_ip->FM1R &= ~(uint32_t)filternbrbitpos;
432 }
433 else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
434 {
435 /*Identifier list mode for the filter*/
436 can_ip->FM1R |= (uint32_t)filternbrbitpos;
437 }
438
439 /* Filter FIFO assignment */
440 if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0)
441 {
442 /* FIFO 0 assignation for the filter */
443 can_ip->FFA1R &= ~(uint32_t)filternbrbitpos;
444 }
445
446 if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO1)
447 {
448 /* FIFO 1 assignation for the filter */
449 can_ip->FFA1R |= (uint32_t)filternbrbitpos;
450 }
451
452 /* Filter activation */
453 if (sFilterConfig->FilterActivation == ENABLE)
454 {
455 can_ip->FA1R |= filternbrbitpos;
456 }
457
458 /* Leave the initialisation mode for the filter */
459 can_ip->FMR &= ~((uint32_t)CAN_FMR_FINIT);
460
461 /* Return function status */
462 return HAL_OK;
463 }
464
465 /**
466 * @brief Deinitializes the CANx peripheral registers to their default reset values.
467 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
468 * the configuration information for the specified CAN.
469 * @retval HAL status
470 */
471 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
472 {
473 /* Check CAN handle */
474 if(hcan == NULL)
475 {
476 return HAL_ERROR;
477 }
478
479 /* Check the parameters */
480 assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance));
481
482 /* Change CAN state */
483 hcan->State = HAL_CAN_STATE_BUSY;
484
485 /* DeInit the low level hardware */
486 HAL_CAN_MspDeInit(hcan);
487
488 /* Change CAN state */
489 hcan->State = HAL_CAN_STATE_RESET;
490
491 /* Release Lock */
492 __HAL_UNLOCK(hcan);
493
494 /* Return function status */
495 return HAL_OK;
496 }
497
498 /**
499 * @brief Initializes the CAN MSP.
500 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
501 * the configuration information for the specified CAN.
502 * @retval None
503 */
504 __weak void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan)
505 {
506 /* Prevent unused argument(s) compilation warning */
507 UNUSED(hcan);
508 /* NOTE : This function Should not be modified, when the callback is needed,
509 the HAL_CAN_MspInit could be implemented in the user file
510 */
511 }
512
513 /**
514 * @brief DeInitializes the CAN MSP.
515 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
516 * the configuration information for the specified CAN.
517 * @retval None
518 */
519 __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan)
520 {
521 /* Prevent unused argument(s) compilation warning */
522 UNUSED(hcan);
523 /* NOTE : This function Should not be modified, when the callback is needed,
524 the HAL_CAN_MspDeInit could be implemented in the user file
525 */
526 }
527
528 /**
529 * @}
530 */
531
532 /** @defgroup CAN_Exported_Functions_Group2 IO operation functions
533 * @brief IO operation functions
534 *
535 @verbatim
536 ==============================================================================
537 ##### IO operation functions #####
538 ==============================================================================
539 [..] This section provides functions allowing to:
540 (+) Transmit a CAN frame message.
541 (+) Receive a CAN frame message.
542 (+) Enter CAN peripheral in sleep mode.
543 (+) Wake up the CAN peripheral from sleep mode.
544
545 @endverbatim
546 * @{
547 */
548
549 /**
550 * @brief Initiates and transmits a CAN frame message.
551 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
552 * the configuration information for the specified CAN.
553 * @param Timeout: Specify Timeout value
554 * @retval HAL status
555 */
556 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef* hcan, uint32_t Timeout)
557 {
558 uint32_t transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
559 uint32_t tickstart = 0;
560
561 /* Check the parameters */
562 assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
563 assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
564 assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
565
566 if(((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) || \
567 ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) || \
568 ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2))
569 {
570 /* Process locked */
571 __HAL_LOCK(hcan);
572
573 if(hcan->State == HAL_CAN_STATE_BUSY_RX)
574 {
575 /* Change CAN state */
576 hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
577 }
578 else
579 {
580 /* Change CAN state */
581 hcan->State = HAL_CAN_STATE_BUSY_TX;
582 }
583
584 /* Select one empty transmit mailbox */
585 if ((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
586 {
587 transmitmailbox = CAN_TXMAILBOX_0;
588 }
589 else if ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
590 {
591 transmitmailbox = CAN_TXMAILBOX_1;
592 }
593 else
594 {
595 transmitmailbox = CAN_TXMAILBOX_2;
596 }
597
598 /* Set up the Id */
599 hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
600 if (hcan->pTxMsg->IDE == CAN_ID_STD)
601 {
602 assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
603 hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \
604 hcan->pTxMsg->RTR);
605 }
606 else
607 {
608 assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
609 hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \
610 hcan->pTxMsg->IDE | \
611 hcan->pTxMsg->RTR);
612 }
613
614 /* Set up the DLC */
615 hcan->pTxMsg->DLC &= (uint8_t)0x0000000FU;
616 hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0U;
617 hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
618
619 /* Set up the data field */
620 hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) |
621 ((uint32_t)hcan->pTxMsg->Data[2] << 16) |
622 ((uint32_t)hcan->pTxMsg->Data[1] << 8) |
623 ((uint32_t)hcan->pTxMsg->Data[0]));
624 hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) |
625 ((uint32_t)hcan->pTxMsg->Data[6] << 16) |
626 ((uint32_t)hcan->pTxMsg->Data[5] << 8) |
627 ((uint32_t)hcan->pTxMsg->Data[4]));
628 /* Request transmission */
629 hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
630
631 /* Get tick */
632 tickstart = HAL_GetTick();
633
634 /* Check End of transmission flag */
635 while(!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox)))
636 {
637 /* Check for the Timeout */
638 if(Timeout != HAL_MAX_DELAY)
639 {
640 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
641 {
642 hcan->State = HAL_CAN_STATE_TIMEOUT;
643 /* Process unlocked */
644 __HAL_UNLOCK(hcan);
645 return HAL_TIMEOUT;
646 }
647 }
648 }
649 if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
650 {
651 /* Change CAN state */
652 hcan->State = HAL_CAN_STATE_BUSY_RX;
653 }
654 else
655 {
656 /* Change CAN state */
657 hcan->State = HAL_CAN_STATE_READY;
658 }
659
660 /* Process unlocked */
661 __HAL_UNLOCK(hcan);
662
663 /* Return function status */
664 return HAL_OK;
665 }
666 else
667 {
668 /* Change CAN state */
669 hcan->State = HAL_CAN_STATE_ERROR;
670
671 /* Return function status */
672 return HAL_ERROR;
673 }
674 }
675
676 /**
677 * @brief Initiates and transmits a CAN frame message.
678 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
679 * the configuration information for the specified CAN.
680 * @retval HAL status
681 */
682 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
683 {
684 uint32_t transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
685
686 /* Check the parameters */
687 assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE));
688 assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR));
689 assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC));
690
691 if(((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) || \
692 ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) || \
693 ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2))
694 {
695 /* Process Locked */
696 __HAL_LOCK(hcan);
697
698 /* Select one empty transmit mailbox */
699 if((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
700 {
701 transmitmailbox = CAN_TXMAILBOX_0;
702 }
703 else if((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
704 {
705 transmitmailbox = CAN_TXMAILBOX_1;
706 }
707 else
708 {
709 transmitmailbox = CAN_TXMAILBOX_2;
710 }
711
712 /* Set up the Id */
713 hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
714 if(hcan->pTxMsg->IDE == CAN_ID_STD)
715 {
716 assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId));
717 hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \
718 hcan->pTxMsg->RTR);
719 }
720 else
721 {
722 assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId));
723 hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \
724 hcan->pTxMsg->IDE | \
725 hcan->pTxMsg->RTR);
726 }
727
728 /* Set up the DLC */
729 hcan->pTxMsg->DLC &= (uint8_t)0x0000000FU;
730 hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0U;
731 hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC;
732
733 /* Set up the data field */
734 hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) |
735 ((uint32_t)hcan->pTxMsg->Data[2] << 16) |
736 ((uint32_t)hcan->pTxMsg->Data[1] << 8) |
737 ((uint32_t)hcan->pTxMsg->Data[0]));
738 hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) |
739 ((uint32_t)hcan->pTxMsg->Data[6] << 16) |
740 ((uint32_t)hcan->pTxMsg->Data[5] << 8) |
741 ((uint32_t)hcan->pTxMsg->Data[4]));
742
743 if(hcan->State == HAL_CAN_STATE_BUSY_RX)
744 {
745 /* Change CAN state */
746 hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
747 }
748 else
749 {
750 /* Change CAN state */
751 hcan->State = HAL_CAN_STATE_BUSY_TX;
752 }
753
754 /* Set CAN error code to none */
755 hcan->ErrorCode = HAL_CAN_ERROR_NONE;
756
757 /* Process Unlocked */
758 __HAL_UNLOCK(hcan);
759
760 /* Enable Error warning, Error passive, Bus-off,
761 Last error and Error Interrupts */
762 __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG |
763 CAN_IT_EPV |
764 CAN_IT_BOF |
765 CAN_IT_LEC |
766 CAN_IT_ERR |
767 CAN_IT_TME);
768
769 /* Request transmission */
770 hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
771 }
772 else
773 {
774 /* Change CAN state */
775 hcan->State = HAL_CAN_STATE_ERROR;
776
777 /* Return function status */
778 return HAL_ERROR;
779 }
780
781 return HAL_OK;
782 }
783
784 /**
785 * @brief Receives a correct CAN frame.
786 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
787 * the configuration information for the specified CAN.
788 * @param FIFONumber: FIFO Number value
789 * @param Timeout: Specify Timeout value
790 * @retval HAL status
791 */
792 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef* hcan, uint8_t FIFONumber, uint32_t Timeout)
793 {
794 uint32_t tickstart = 0;
795
796 /* Check the parameters */
797 assert_param(IS_CAN_FIFO(FIFONumber));
798
799 /* Process locked */
800 __HAL_LOCK(hcan);
801
802 if(hcan->State == HAL_CAN_STATE_BUSY_TX)
803 {
804 /* Change CAN state */
805 hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
806 }
807 else
808 {
809 /* Change CAN state */
810 hcan->State = HAL_CAN_STATE_BUSY_RX;
811 }
812
813 /* Get tick */
814 tickstart = HAL_GetTick();
815
816 /* Check pending message */
817 while(__HAL_CAN_MSG_PENDING(hcan, FIFONumber) == 0)
818 {
819 /* Check for the Timeout */
820 if(Timeout != HAL_MAX_DELAY)
821 {
822 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
823 {
824 hcan->State = HAL_CAN_STATE_TIMEOUT;
825 /* Process unlocked */
826 __HAL_UNLOCK(hcan);
827 return HAL_TIMEOUT;
828 }
829 }
830 }
831
832 /* Get the Id */
833 hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
834 if (hcan->pRxMsg->IDE == CAN_ID_STD)
835 {
836 hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21);
837 }
838 else
839 {
840 hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3);
841 }
842
843 hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
844 /* Get the DLC */
845 hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
846 /* Get the FMI */
847 hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8);
848 /* Get the data field */
849 hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
850 hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8);
851 hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16);
852 hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24);
853 hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
854 hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8);
855 hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16);
856 hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24);
857
858 /* Release the FIFO */
859 if(FIFONumber == CAN_FIFO0)
860 {
861 /* Release FIFO0 */
862 __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
863 }
864 else /* FIFONumber == CAN_FIFO1 */
865 {
866 /* Release FIFO1 */
867 __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
868 }
869
870 if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
871 {
872 /* Change CAN state */
873 hcan->State = HAL_CAN_STATE_BUSY_TX;
874 }
875 else
876 {
877 /* Change CAN state */
878 hcan->State = HAL_CAN_STATE_READY;
879 }
880
881 /* Process unlocked */
882 __HAL_UNLOCK(hcan);
883
884 /* Return function status */
885 return HAL_OK;
886 }
887
888 /**
889 * @brief Receives a correct CAN frame.
890 * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
891 * the configuration information for the specified CAN.
892 * @param FIFONumber: Specify the FIFO number
893 * @retval HAL status
894 */
895 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
896 {
897 uint32_t tmp = 0;
898
899 /* Check the parameters */
900 assert_param(IS_CAN_FIFO(FIFONumber));
901
902 tmp = hcan->State;
903 if((tmp == HAL_CAN_STATE_READY) || (tmp == HAL_CAN_STATE_BUSY_TX))
904 {
905 /* Process locked */
906 __HAL_LOCK(hcan);
907
908 if(hcan->State == HAL_CAN_STATE_BUSY_TX)
909 {
910 /* Change CAN state */
911 hcan->State = HAL_CAN_STATE_BUSY_TX_RX;
912 }
913 else
914 {
915 /* Change CAN state */
916 hcan->State = HAL_CAN_STATE_BUSY_RX;
917 }
918
919 /* Set CAN error code to none */
920 hcan->ErrorCode = HAL_CAN_ERROR_NONE;
921
922 /* Enable Error warning, Error passive, Bus-off,
923 Last error and Error Interrupts */
924 __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG |
925 CAN_IT_EPV |
926 CAN_IT_BOF |
927 CAN_IT_LEC |
928 CAN_IT_ERR);
929
930 /* Process unlocked */
931 __HAL_UNLOCK(hcan);
932
933 if(FIFONumber == CAN_FIFO0)
934 {
935 /* Enable FIFO 0 message pending Interrupt */
936 __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP0);
937 }
938 else
939 {
940 /* Enable FIFO 1 message pending Interrupt */
941 __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP1);
942 }
943
944 }
945 else
946 {
947 return HAL_BUSY;
948 }
949
950 /* Return function status */
951 return HAL_OK;
952 }
953
954 /**
955 * @brief Enters the Sleep (low power) mode.
956 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
957 * the configuration information for the specified CAN.
958 * @retval HAL status.
959 */
960 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef* hcan)
961 {
962 uint32_t tickstart = 0;
963
964 /* Process locked */
965 __HAL_LOCK(hcan);
966
967 /* Change CAN state */
968 hcan->State = HAL_CAN_STATE_BUSY;
969
970 /* Request Sleep mode */
971 hcan->Instance->MCR = (((hcan->Instance->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
972
973 /* Sleep mode status */
974 if ((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
975 {
976 /* Process unlocked */
977 __HAL_UNLOCK(hcan);
978
979 /* Return function status */
980 return HAL_ERROR;
981 }
982
983 /* Get tick */
984 tickstart = HAL_GetTick();
985
986 /* Wait the acknowledge */
987 while((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK)
988 {
989 if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
990 {
991 hcan->State = HAL_CAN_STATE_TIMEOUT;
992 /* Process unlocked */
993 __HAL_UNLOCK(hcan);
994 return HAL_TIMEOUT;
995 }
996 }
997
998 /* Change CAN state */
999 hcan->State = HAL_CAN_STATE_READY;
1000
1001 /* Process unlocked */
1002 __HAL_UNLOCK(hcan);
1003
1004 /* Return function status */
1005 return HAL_OK;
1006 }
1007
1008 /**
1009 * @brief Wakes up the CAN peripheral from sleep mode, after that the CAN peripheral
1010 * is in the normal mode.
1011 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
1012 * the configuration information for the specified CAN.
1013 * @retval HAL status.
1014 */
1015 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef* hcan)
1016 {
1017 uint32_t tickstart = 0;
1018
1019 /* Process locked */
1020 __HAL_LOCK(hcan);
1021
1022 /* Change CAN state */
1023 hcan->State = HAL_CAN_STATE_BUSY;
1024
1025 /* Wake up request */
1026 hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
1027
1028 /* Get tick */
1029 tickstart = HAL_GetTick();
1030
1031 /* Sleep mode status */
1032 while((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
1033 {
1034 if((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE)
1035 {
1036 hcan->State= HAL_CAN_STATE_TIMEOUT;
1037 /* Process unlocked */
1038 __HAL_UNLOCK(hcan);
1039 return HAL_TIMEOUT;
1040 }
1041 }
1042 if((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)
1043 {
1044 /* Process unlocked */
1045 __HAL_UNLOCK(hcan);
1046
1047 /* Return function status */
1048 return HAL_ERROR;
1049 }
1050
1051 /* Change CAN state */
1052 hcan->State = HAL_CAN_STATE_READY;
1053
1054 /* Process unlocked */
1055 __HAL_UNLOCK(hcan);
1056
1057 /* Return function status */
1058 return HAL_OK;
1059 }
1060
1061 /**
1062 * @brief Handles CAN interrupt request
1063 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
1064 * the configuration information for the specified CAN.
1065 * @retval None
1066 */
1067 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan)
1068 {
1069 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
1070
1071 /* Check End of transmission flag */
1072 if(__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_TME))
1073 {
1074 tmp1 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0);
1075 tmp2 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1);
1076 tmp3 = __HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2);
1077 if(tmp1 || tmp2 || tmp3)
1078 {
1079 /* Call transmit function */
1080 CAN_Transmit_IT(hcan);
1081 }
1082 }
1083
1084 tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0);
1085 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0);
1086 /* Check End of reception flag for FIFO0 */
1087 if((tmp1 != 0) && tmp2)
1088 {
1089 /* Call receive function */
1090 CAN_Receive_IT(hcan, CAN_FIFO0);
1091 }
1092
1093 tmp1 = __HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1);
1094 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1);
1095 /* Check End of reception flag for FIFO1 */
1096 if((tmp1 != 0) && tmp2)
1097 {
1098 /* Call receive function */
1099 CAN_Receive_IT(hcan, CAN_FIFO1);
1100 }
1101
1102 tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EWG);
1103 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EWG);
1104 tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
1105 /* Check Error Warning Flag */
1106 if(tmp1 && tmp2 && tmp3)
1107 {
1108 /* Set CAN error code to EWG error */
1109 hcan->ErrorCode |= HAL_CAN_ERROR_EWG;
1110 }
1111
1112 tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EPV);
1113 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EPV);
1114 tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
1115 /* Check Error Passive Flag */
1116 if(tmp1 && tmp2 && tmp3)
1117 {
1118 /* Set CAN error code to EPV error */
1119 hcan->ErrorCode |= HAL_CAN_ERROR_EPV;
1120 }
1121
1122 tmp1 = __HAL_CAN_GET_FLAG(hcan, CAN_FLAG_BOF);
1123 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_BOF);
1124 tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
1125 /* Check Bus-Off Flag */
1126 if(tmp1 && tmp2 && tmp3)
1127 {
1128 /* Set CAN error code to BOF error */
1129 hcan->ErrorCode |= HAL_CAN_ERROR_BOF;
1130 }
1131
1132 tmp1 = HAL_IS_BIT_CLR(hcan->Instance->ESR, CAN_ESR_LEC);
1133 tmp2 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_LEC);
1134 tmp3 = __HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR);
1135 /* Check Last error code Flag */
1136 if((!tmp1) && tmp2 && tmp3)
1137 {
1138 tmp1 = (hcan->Instance->ESR) & CAN_ESR_LEC;
1139 switch(tmp1)
1140 {
1141 case(CAN_ESR_LEC_0):
1142 /* Set CAN error code to STF error */
1143 hcan->ErrorCode |= HAL_CAN_ERROR_STF;
1144 break;
1145 case(CAN_ESR_LEC_1):
1146 /* Set CAN error code to FOR error */
1147 hcan->ErrorCode |= HAL_CAN_ERROR_FOR;
1148 break;
1149 case(CAN_ESR_LEC_1 | CAN_ESR_LEC_0):
1150 /* Set CAN error code to ACK error */
1151 hcan->ErrorCode |= HAL_CAN_ERROR_ACK;
1152 break;
1153 case(CAN_ESR_LEC_2):
1154 /* Set CAN error code to BR error */
1155 hcan->ErrorCode |= HAL_CAN_ERROR_BR;
1156 break;
1157 case(CAN_ESR_LEC_2 | CAN_ESR_LEC_0):
1158 /* Set CAN error code to BD error */
1159 hcan->ErrorCode |= HAL_CAN_ERROR_BD;
1160 break;
1161 case(CAN_ESR_LEC_2 | CAN_ESR_LEC_1):
1162 /* Set CAN error code to CRC error */
1163 hcan->ErrorCode |= HAL_CAN_ERROR_CRC;
1164 break;
1165 default:
1166 break;
1167 }
1168
1169 /* Clear Last error code Flag */
1170 hcan->Instance->ESR &= ~(CAN_ESR_LEC);
1171 }
1172
1173 /* Call the Error call Back in case of Errors */
1174 if(hcan->ErrorCode != HAL_CAN_ERROR_NONE)
1175 {
1176 /* Clear ERRI Flag */
1177 hcan->Instance->MSR = CAN_MSR_ERRI;
1178 /* Set the CAN state ready to be able to start again the process */
1179 hcan->State = HAL_CAN_STATE_READY;
1180 /* Call Error callback function */
1181 HAL_CAN_ErrorCallback(hcan);
1182 }
1183 }
1184
1185 /**
1186 * @brief Transmission complete callback in non blocking mode
1187 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
1188 * the configuration information for the specified CAN.
1189 * @retval None
1190 */
1191 __weak void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan)
1192 {
1193 /* Prevent unused argument(s) compilation warning */
1194 UNUSED(hcan);
1195 /* NOTE : This function Should not be modified, when the callback is needed,
1196 the HAL_CAN_TxCpltCallback could be implemented in the user file
1197 */
1198 }
1199
1200 /**
1201 * @brief Transmission complete callback in non blocking mode
1202 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
1203 * the configuration information for the specified CAN.
1204 * @retval None
1205 */
1206 __weak void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan)
1207 {
1208 /* Prevent unused argument(s) compilation warning */
1209 UNUSED(hcan);
1210 /* NOTE : This function Should not be modified, when the callback is needed,
1211 the HAL_CAN_RxCpltCallback could be implemented in the user file
1212 */
1213 }
1214
1215 /**
1216 * @brief Error CAN callback.
1217 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
1218 * the configuration information for the specified CAN.
1219 * @retval None
1220 */
1221 __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan)
1222 {
1223 /* Prevent unused argument(s) compilation warning */
1224 UNUSED(hcan);
1225 /* NOTE : This function Should not be modified, when the callback is needed,
1226 the HAL_CAN_ErrorCallback could be implemented in the user file
1227 */
1228 }
1229
1230 /**
1231 * @}
1232 */
1233
1234 /** @defgroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
1235 * @brief CAN Peripheral State functions
1236 *
1237 @verbatim
1238 ==============================================================================
1239 ##### Peripheral State and Error functions #####
1240 ==============================================================================
1241 [..]
1242 This subsection provides functions allowing to :
1243 (+) Check the CAN state.
1244 (+) Check CAN Errors detected during interrupt process
1245
1246 @endverbatim
1247 * @{
1248 */
1249
1250 /**
1251 * @brief return the CAN state
1252 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
1253 * the configuration information for the specified CAN.
1254 * @retval HAL state
1255 */
1256 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan)
1257 {
1258 /* Return CAN state */
1259 return hcan->State;
1260 }
1261
1262 /**
1263 * @brief Return the CAN error code
1264 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
1265 * the configuration information for the specified CAN.
1266 * @retval CAN Error Code
1267 */
1268 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan)
1269 {
1270 return hcan->ErrorCode;
1271 }
1272
1273 /**
1274 * @}
1275 */
1276 /**
1277 * @brief Initiates and transmits a CAN frame message.
1278 * @param hcan: pointer to a CAN_HandleTypeDef structure that contains
1279 * the configuration information for the specified CAN.
1280 * @retval HAL status
1281 */
1282 static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan)
1283 {
1284 /* Disable Transmit mailbox empty Interrupt */
1285 __HAL_CAN_DISABLE_IT(hcan, CAN_IT_TME);
1286
1287 if(hcan->State == HAL_CAN_STATE_BUSY_TX)
1288 {
1289 /* Disable Error warning, Error passive, Bus-off, Last error code
1290 and Error Interrupts */
1291 __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG |
1292 CAN_IT_EPV |
1293 CAN_IT_BOF |
1294 CAN_IT_LEC |
1295 CAN_IT_ERR );
1296 }
1297
1298 if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
1299 {
1300 /* Change CAN state */
1301 hcan->State = HAL_CAN_STATE_BUSY_RX;
1302 }
1303 else
1304 {
1305 /* Change CAN state */
1306 hcan->State = HAL_CAN_STATE_READY;
1307 }
1308
1309 /* Transmission complete callback */
1310 HAL_CAN_TxCpltCallback(hcan);
1311
1312 return HAL_OK;
1313 }
1314
1315 /**
1316 * @brief Receives a correct CAN frame.
1317 * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains
1318 * the configuration information for the specified CAN.
1319 * @param FIFONumber: Specify the FIFO number
1320 * @retval HAL status
1321 * @retval None
1322 */
1323 static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber)
1324 {
1325 /* Get the Id */
1326 hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
1327 if (hcan->pRxMsg->IDE == CAN_ID_STD)
1328 {
1329 hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21);
1330 }
1331 else
1332 {
1333 hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3);
1334 }
1335
1336 hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR;
1337 /* Get the DLC */
1338 hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR;
1339 /* Get the FMI */
1340 hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8);
1341 /* Get the data field */
1342 hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR;
1343 hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8);
1344 hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16);
1345 hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24);
1346 hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR;
1347 hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8);
1348 hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16);
1349 hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24);
1350 /* Release the FIFO */
1351 /* Release FIFO0 */
1352 if (FIFONumber == CAN_FIFO0)
1353 {
1354 __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0);
1355
1356 /* Disable FIFO 0 message pending Interrupt */
1357 __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP0);
1358 }
1359 /* Release FIFO1 */
1360 else /* FIFONumber == CAN_FIFO1 */
1361 {
1362 __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1);
1363
1364 /* Disable FIFO 1 message pending Interrupt */
1365 __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP1);
1366 }
1367
1368 if(hcan->State == HAL_CAN_STATE_BUSY_RX)
1369 {
1370 /* Disable Error warning, Error passive, Bus-off, Last error code
1371 and Error Interrupts */
1372 __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG |
1373 CAN_IT_EPV |
1374 CAN_IT_BOF |
1375 CAN_IT_LEC |
1376 CAN_IT_ERR);
1377 }
1378
1379 if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX)
1380 {
1381 /* Disable CAN state */
1382 hcan->State = HAL_CAN_STATE_BUSY_TX;
1383 }
1384 else
1385 {
1386 /* Change CAN state */
1387 hcan->State = HAL_CAN_STATE_READY;
1388 }
1389
1390 /* Receive complete callback */
1391 HAL_CAN_RxCpltCallback(hcan);
1392
1393 /* Return function status */
1394 return HAL_OK;
1395 }
1396
1397 /**
1398 * @}
1399 */
1400
1401 #endif /* HAL_CAN_MODULE_ENABLED */
1402 /**
1403 * @}
1404 */
1405
1406 /**
1407 * @}
1408 */
1409
1410 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Repo containing the code for the mTask system (see msc-thesis1617)