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[mTask.git] / int / com / lib / STM32F7xx_HAL_Driver / Src / stm32f7xx_hal_dfsdm.c
1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_dfsdm.c
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 22-April-2016
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Digital Filter for Sigma-Delta Modulators
9 * (DFSDM) peripherals:
10 * + Initialization and configuration of channels and filters
11 * + Regular channels configuration
12 * + Injected channels configuration
13 * + Regular/Injected Channels DMA Configuration
14 * + Interrupts and flags management
15 * + Analog watchdog feature
16 * + Short-circuit detector feature
17 * + Extremes detector feature
18 * + Clock absence detector feature
19 * + Break generation on analog watchdog or short-circuit event
20 *
21 @verbatim
22 ==============================================================================
23 ##### How to use this driver #####
24 ==============================================================================
25 [..]
26 *** Channel initialization ***
27 ==============================
28 [..]
29 (#) User has first to initialize channels (before filters initialization).
30 (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
31 (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
32 (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
33 (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
34 (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
35 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
36 (#) Configure the output clock, input, serial interface, analog watchdog,
37 offset and data right bit shift parameters for this channel using the
38 HAL_DFSDM_ChannelInit() function.
39
40 *** Channel clock absence detector ***
41 ======================================
42 [..]
43 (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
44 HAL_DFSDM_ChannelCkabStart_IT().
45 (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
46 absence.
47 (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
48 clock absence is detected.
49 (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
50 HAL_DFSDM_ChannelCkabStop_IT().
51 (#) Please note that the same mode (polling or interrupt) has to be used
52 for all channels because the channels are sharing the same interrupt.
53 (#) Please note also that in interrupt mode, if clock absence detector is
54 stopped for one channel, interrupt will be disabled for all channels.
55
56 *** Channel short circuit detector ***
57 ======================================
58 [..]
59 (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
60 or HAL_DFSDM_ChannelScdStart_IT().
61 (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
62 circuit.
63 (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
64 short circuit is detected.
65 (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
66 or HAL_DFSDM_ChannelScdStop_IT().
67 (#) Please note that the same mode (polling or interrupt) has to be used
68 for all channels because the channels are sharing the same interrupt.
69 (#) Please note also that in interrupt mode, if short circuit detector is
70 stopped for one channel, interrupt will be disabled for all channels.
71
72 *** Channel analog watchdog value ***
73 =====================================
74 [..]
75 (#) Get analog watchdog filter value of a channel using
76 HAL_DFSDM_ChannelGetAwdValue().
77
78 *** Channel offset value ***
79 =====================================
80 [..]
81 (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
82
83 *** Filter initialization ***
84 =============================
85 [..]
86 (#) After channel initialization, user has to init filters.
87 (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
88 (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
89 interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
90 Please note that DFSDMz_FLT0 global interrupt could be already
91 enabled if interrupt is used for channel.
92 (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
93 with DFSDMz filter handle using __HAL_LINKDMA().
94 (#) Configure the regular conversion, injected conversion and filter
95 parameters for this filter using the HAL_DFSDM_FilterInit() function.
96
97 *** Filter regular channel conversion ***
98 =========================================
99 [..]
100 (#) Select regular channel and enable/disable continuous mode using
101 HAL_DFSDM_FilterConfigRegChannel().
102 (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
103 HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
104 HAL_DFSDM_FilterRegularMsbStart_DMA().
105 (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
106 the end of regular conversion.
107 (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
108 at the end of regular conversion.
109 (#) Get value of regular conversion and corresponding channel using
110 HAL_DFSDM_FilterGetRegularValue().
111 (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
112 HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
113 half transfer and at the transfer complete. Please note that
114 HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
115 circular mode.
116 (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
117 HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
118
119 *** Filter injected channels conversion ***
120 ===========================================
121 [..]
122 (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
123 (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
124 HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
125 HAL_DFSDM_FilterInjectedMsbStart_DMA().
126 (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
127 the end of injected conversion.
128 (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
129 at the end of injected conversion.
130 (#) Get value of injected conversion and corresponding channel using
131 HAL_DFSDM_FilterGetInjectedValue().
132 (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
133 HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
134 half transfer and at the transfer complete. Please note that
135 HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
136 circular mode.
137 (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
138 HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
139
140 *** Filter analog watchdog ***
141 ==============================
142 [..]
143 (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
144 (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
145 (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
146
147 *** Filter extreme detector ***
148 ===============================
149 [..]
150 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
151 (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
152 (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
153 (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
154
155 *** Filter conversion time ***
156 ==============================
157 [..]
158 (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
159
160 @endverbatim
161 ******************************************************************************
162 * @attention
163 *
164 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
165 *
166 * Redistribution and use in source and binary forms, with or without modification,
167 * are permitted provided that the following conditions are met:
168 * 1. Redistributions of source code must retain the above copyright notice,
169 * this list of conditions and the following disclaimer.
170 * 2. Redistributions in binary form must reproduce the above copyright notice,
171 * this list of conditions and the following disclaimer in the documentation
172 * and/or other materials provided with the distribution.
173 * 3. Neither the name of STMicroelectronics nor the names of its contributors
174 * may be used to endorse or promote products derived from this software
175 * without specific prior written permission.
176 *
177 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
178 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
179 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
180 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
181 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
182 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
183 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
184 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
185 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
186 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
187 *
188 ******************************************************************************
189 */
190
191 /* Includes ------------------------------------------------------------------*/
192 #include "stm32f7xx_hal.h"
193
194 /** @addtogroup STM32F7xx_HAL_Driver
195 * @{
196 */
197 #ifdef HAL_DFSDM_MODULE_ENABLED
198 #if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
199 /** @defgroup DFSDM DFSDM
200 * @brief DFSDM HAL driver module
201 * @{
202 */
203
204 /* Private typedef -----------------------------------------------------------*/
205 /* Private define ------------------------------------------------------------*/
206 /** @defgroup DFSDM_Private_Define DFSDM Private Define
207 * @{
208 */
209 #define DFSDM_CHCFGR1_CLK_DIV_OFFSET POSITION_VAL(DFSDM_CHCFGR1_CKOUTDIV)
210 #define DFSDM_CHAWSCDR_BKSCD_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_BKSCD)
211 #define DFSDM_CHAWSCDR_FOSR_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_AWFOSR)
212 #define DFSDM_CHCFGR2_OFFSET_OFFSET POSITION_VAL(DFSDM_CHCFGR2_OFFSET)
213 #define DFSDM_CHCFGR2_DTRBS_OFFSET POSITION_VAL(DFSDM_CHCFGR2_DTRBS)
214 #define DFSDM_FLTFCR_FOSR_OFFSET POSITION_VAL(DFSDM_FLTFCR_FOSR)
215 #define DFSDM_FLTCR1_MSB_RCH_OFFSET 8
216 #define DFSDM_FLTCR2_EXCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_EXCH)
217 #define DFSDM_FLTCR2_AWDCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_AWDCH)
218 #define DFSDM_FLTISR_CKABF_OFFSET POSITION_VAL(DFSDM_FLTISR_CKABF)
219 #define DFSDM_FLTISR_SCDF_OFFSET POSITION_VAL(DFSDM_FLTISR_SCDF)
220 #define DFSDM_FLTICR_CLRCKABF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRCKABF)
221 #define DFSDM_FLTICR_CLRSCDF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRSCSDF)
222 #define DFSDM_FLTRDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTRDATAR_RDATA)
223 #define DFSDM_FLTJDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTJDATAR_JDATA)
224 #define DFSDM_FLTAWHTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWHTR_AWHT)
225 #define DFSDM_FLTAWLTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWLTR_AWLT)
226 #define DFSDM_FLTEXMAX_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMAX_EXMAX)
227 #define DFSDM_FLTEXMIN_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMIN_EXMIN)
228 #define DFSDM_FLTCNVTIMR_DATA_OFFSET POSITION_VAL(DFSDM_FLTCNVTIMR_CNVCNT)
229 #define DFSDM_FLTAWSR_HIGH_OFFSET POSITION_VAL(DFSDM_FLTAWSR_AWHTF)
230 #define DFSDM_MSB_MASK 0xFFFF0000U
231 #define DFSDM_LSB_MASK 0x0000FFFFU
232 #define DFSDM_CKAB_TIMEOUT 5000U
233 #define DFSDM1_CHANNEL_NUMBER 8U
234 /**
235 * @}
236 */
237
238 /* Private macro -------------------------------------------------------------*/
239 /* Private variables ---------------------------------------------------------*/
240 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
241 * @{
242 */
243 __IO uint32_t v_dfsdm1ChannelCounter = 0;
244 DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
245 /**
246 * @}
247 */
248
249 /* Private function prototypes -----------------------------------------------*/
250 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
251 * @{
252 */
253 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
254 static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
255 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
256 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
257 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
258 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
259 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
260 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
261 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
262 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
263 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
264 /**
265 * @}
266 */
267
268 /* Exported functions --------------------------------------------------------*/
269 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
270 * @{
271 */
272
273 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
274 * @brief Channel initialization and de-initialization functions
275 *
276 @verbatim
277 ==============================================================================
278 ##### Channel initialization and de-initialization functions #####
279 ==============================================================================
280 [..] This section provides functions allowing to:
281 (+) Initialize the DFSDM channel.
282 (+) De-initialize the DFSDM channel.
283 @endverbatim
284 * @{
285 */
286
287 /**
288 * @brief Initialize the DFSDM channel according to the specified parameters
289 * in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
290 * @param hdfsdm_channel : DFSDM channel handle.
291 * @retval HAL status.
292 */
293 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
294 {
295 /* Check DFSDM Channel handle */
296 if(hdfsdm_channel == NULL)
297 {
298 return HAL_ERROR;
299 }
300
301 /* Check parameters */
302 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
303 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
304 assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
305 assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
306 assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
307 assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
308 assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
309 assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
310 assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
311 assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
312 assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
313
314 /* Check that channel has not been already initialized */
315 if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
316 {
317 return HAL_ERROR;
318 }
319
320 /* Call MSP init function */
321 HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
322
323 /* Update the channel counter */
324 v_dfsdm1ChannelCounter++;
325
326 /* Configure output serial clock and enable global DFSDM interface only for first channel */
327 if(v_dfsdm1ChannelCounter == 1)
328 {
329 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
330 /* Set the output serial clock source */
331 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
332 DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
333
334 /* Reset clock divider */
335 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
336 if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
337 {
338 assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
339 /* Set the output clock divider */
340 DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1) <<
341 DFSDM_CHCFGR1_CLK_DIV_OFFSET);
342 }
343
344 /* enable the DFSDM global interface */
345 DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
346 }
347
348 /* Set channel input parameters */
349 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
350 DFSDM_CHCFGR1_CHINSEL);
351 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
352 hdfsdm_channel->Init.Input.DataPacking |
353 hdfsdm_channel->Init.Input.Pins);
354
355 /* Set serial interface parameters */
356 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
357 hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
358 hdfsdm_channel->Init.SerialInterface.SpiClock);
359
360 /* Set analog watchdog parameters */
361 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
362 hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
363 ((hdfsdm_channel->Init.Awd.Oversampling - 1) << DFSDM_CHAWSCDR_FOSR_OFFSET));
364
365 /* Set channel offset and right bit shift */
366 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
367 hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) |
368 (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
369
370 /* Enable DFSDM channel */
371 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
372
373 /* Set DFSDM Channel to ready state */
374 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
375
376 /* Store channel handle in DFSDM channel handle table */
377 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
378
379 return HAL_OK;
380 }
381
382 /**
383 * @brief De-initialize the DFSDM channel.
384 * @param hdfsdm_channel : DFSDM channel handle.
385 * @retval HAL status.
386 */
387 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
388 {
389 /* Check DFSDM Channel handle */
390 if(hdfsdm_channel == NULL)
391 {
392 return HAL_ERROR;
393 }
394
395 /* Check parameters */
396 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
397
398 /* Check that channel has not been already deinitialized */
399 if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
400 {
401 return HAL_ERROR;
402 }
403
404 /* Disable the DFSDM channel */
405 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
406
407 /* Update the channel counter */
408 v_dfsdm1ChannelCounter--;
409
410 /* Disable global DFSDM at deinit of last channel */
411 if(v_dfsdm1ChannelCounter == 0)
412 {
413 DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
414 }
415
416 /* Call MSP deinit function */
417 HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
418
419 /* Set DFSDM Channel in reset state */
420 hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
421
422 /* Reset channel handle in DFSDM channel handle table */
423 a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
424
425 return HAL_OK;
426 }
427
428 /**
429 * @brief Initialize the DFSDM channel MSP.
430 * @param hdfsdm_channel : DFSDM channel handle.
431 * @retval None
432 */
433 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
434 {
435 /* Prevent unused argument(s) compilation warning */
436 UNUSED(hdfsdm_channel);
437
438 /* NOTE : This function should not be modified, when the function is needed,
439 the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
440 */
441 }
442
443 /**
444 * @brief De-initialize the DFSDM channel MSP.
445 * @param hdfsdm_channel : DFSDM channel handle.
446 * @retval None
447 */
448 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
449 {
450 /* Prevent unused argument(s) compilation warning */
451 UNUSED(hdfsdm_channel);
452
453 /* NOTE : This function should not be modified, when the function is needed,
454 the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
455 */
456 }
457
458 /**
459 * @}
460 */
461
462 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
463 * @brief Channel operation functions
464 *
465 @verbatim
466 ==============================================================================
467 ##### Channel operation functions #####
468 ==============================================================================
469 [..] This section provides functions allowing to:
470 (+) Manage clock absence detector feature.
471 (+) Manage short circuit detector feature.
472 (+) Get analog watchdog value.
473 (+) Modify offset value.
474 @endverbatim
475 * @{
476 */
477
478 /**
479 * @brief This function allows to start clock absence detection in polling mode.
480 * @note Same mode has to be used for all channels.
481 * @note If clock is not available on this channel during 5 seconds,
482 * clock absence detection will not be activated and function
483 * will return HAL_TIMEOUT error.
484 * @param hdfsdm_channel : DFSDM channel handle.
485 * @retval HAL status
486 */
487 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
488 {
489 HAL_StatusTypeDef status = HAL_OK;
490 uint32_t channel;
491 uint32_t tickstart;
492
493 /* Check parameters */
494 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
495
496 /* Check DFSDM channel state */
497 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
498 {
499 /* Return error status */
500 status = HAL_ERROR;
501 }
502 else
503 {
504 /* Get channel number from channel instance */
505 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
506
507 /* Get timeout */
508 tickstart = HAL_GetTick();
509
510 /* Clear clock absence flag */
511 while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
512 {
513 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
514
515 /* Check the Timeout */
516 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
517 {
518 /* Set timeout status */
519 status = HAL_TIMEOUT;
520 break;
521 }
522 }
523
524 if(status == HAL_OK)
525 {
526 /* Start clock absence detection */
527 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
528 }
529 }
530 /* Return function status */
531 return status;
532 }
533
534 /**
535 * @brief This function allows to poll for the clock absence detection.
536 * @param hdfsdm_channel : DFSDM channel handle.
537 * @param Timeout : Timeout value in milliseconds.
538 * @retval HAL status
539 */
540 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
541 uint32_t Timeout)
542 {
543 uint32_t tickstart;
544 uint32_t channel;
545
546 /* Check parameters */
547 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
548
549 /* Check DFSDM channel state */
550 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
551 {
552 /* Return error status */
553 return HAL_ERROR;
554 }
555 else
556 {
557 /* Get channel number from channel instance */
558 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
559
560 /* Get timeout */
561 tickstart = HAL_GetTick();
562
563 /* Wait clock absence detection */
564 while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) == 0)
565 {
566 /* Check the Timeout */
567 if(Timeout != HAL_MAX_DELAY)
568 {
569 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
570 {
571 /* Return timeout status */
572 return HAL_TIMEOUT;
573 }
574 }
575 }
576
577 /* Clear clock absence detection flag */
578 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
579
580 /* Return function status */
581 return HAL_OK;
582 }
583 }
584
585 /**
586 * @brief This function allows to stop clock absence detection in polling mode.
587 * @param hdfsdm_channel : DFSDM channel handle.
588 * @retval HAL status
589 */
590 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
591 {
592 HAL_StatusTypeDef status = HAL_OK;
593 uint32_t channel;
594
595 /* Check parameters */
596 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
597
598 /* Check DFSDM channel state */
599 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
600 {
601 /* Return error status */
602 status = HAL_ERROR;
603 }
604 else
605 {
606 /* Stop clock absence detection */
607 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
608
609 /* Clear clock absence flag */
610 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
611 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
612 }
613 /* Return function status */
614 return status;
615 }
616
617 /**
618 * @brief This function allows to start clock absence detection in interrupt mode.
619 * @note Same mode has to be used for all channels.
620 * @note If clock is not available on this channel during 5 seconds,
621 * clock absence detection will not be activated and function
622 * will return HAL_TIMEOUT error.
623 * @param hdfsdm_channel : DFSDM channel handle.
624 * @retval HAL status
625 */
626 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
627 {
628 HAL_StatusTypeDef status = HAL_OK;
629 uint32_t channel;
630 uint32_t tickstart;
631
632 /* Check parameters */
633 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
634
635 /* Check DFSDM channel state */
636 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
637 {
638 /* Return error status */
639 status = HAL_ERROR;
640 }
641 else
642 {
643 /* Get channel number from channel instance */
644 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
645
646 /* Get timeout */
647 tickstart = HAL_GetTick();
648
649 /* Clear clock absence flag */
650 while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1) != 0)
651 {
652 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
653
654 /* Check the Timeout */
655 if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
656 {
657 /* Set timeout status */
658 status = HAL_TIMEOUT;
659 break;
660 }
661 }
662
663 if(status == HAL_OK)
664 {
665 /* Activate clock absence detection interrupt */
666 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
667
668 /* Start clock absence detection */
669 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
670 }
671 }
672 /* Return function status */
673 return status;
674 }
675
676 /**
677 * @brief Clock absence detection callback.
678 * @param hdfsdm_channel : DFSDM channel handle.
679 * @retval None
680 */
681 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
682 {
683 /* Prevent unused argument(s) compilation warning */
684 UNUSED(hdfsdm_channel);
685
686 /* NOTE : This function should not be modified, when the callback is needed,
687 the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
688 */
689 }
690
691 /**
692 * @brief This function allows to stop clock absence detection in interrupt mode.
693 * @note Interrupt will be disabled for all channels
694 * @param hdfsdm_channel : DFSDM channel handle.
695 * @retval HAL status
696 */
697 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
698 {
699 HAL_StatusTypeDef status = HAL_OK;
700 uint32_t channel;
701
702 /* Check parameters */
703 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
704
705 /* Check DFSDM channel state */
706 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
707 {
708 /* Return error status */
709 status = HAL_ERROR;
710 }
711 else
712 {
713 /* Stop clock absence detection */
714 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
715
716 /* Clear clock absence flag */
717 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
718 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
719
720 /* Disable clock absence detection interrupt */
721 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
722 }
723 /* Return function status */
724 return status;
725 }
726
727 /**
728 * @brief This function allows to start short circuit detection in polling mode.
729 * @note Same mode has to be used for all channels
730 * @param hdfsdm_channel : DFSDM channel handle.
731 * @param Threshold : Short circuit detector threshold.
732 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
733 * @param BreakSignal : Break signals assigned to short circuit event.
734 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
735 * @retval HAL status
736 */
737 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
738 uint32_t Threshold,
739 uint32_t BreakSignal)
740 {
741 HAL_StatusTypeDef status = HAL_OK;
742
743 /* Check parameters */
744 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
745 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
746 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
747
748 /* Check DFSDM channel state */
749 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
750 {
751 /* Return error status */
752 status = HAL_ERROR;
753 }
754 else
755 {
756 /* Configure threshold and break signals */
757 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
758 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
759 Threshold);
760
761 /* Start short circuit detection */
762 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
763 }
764 /* Return function status */
765 return status;
766 }
767
768 /**
769 * @brief This function allows to poll for the short circuit detection.
770 * @param hdfsdm_channel : DFSDM channel handle.
771 * @param Timeout : Timeout value in milliseconds.
772 * @retval HAL status
773 */
774 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
775 uint32_t Timeout)
776 {
777 uint32_t tickstart;
778 uint32_t channel;
779
780 /* Check parameters */
781 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
782
783 /* Check DFSDM channel state */
784 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
785 {
786 /* Return error status */
787 return HAL_ERROR;
788 }
789 else
790 {
791 /* Get channel number from channel instance */
792 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
793
794 /* Get timeout */
795 tickstart = HAL_GetTick();
796
797 /* Wait short circuit detection */
798 while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0)
799 {
800 /* Check the Timeout */
801 if(Timeout != HAL_MAX_DELAY)
802 {
803 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
804 {
805 /* Return timeout status */
806 return HAL_TIMEOUT;
807 }
808 }
809 }
810
811 /* Clear short circuit detection flag */
812 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
813
814 /* Return function status */
815 return HAL_OK;
816 }
817 }
818
819 /**
820 * @brief This function allows to stop short circuit detection in polling mode.
821 * @param hdfsdm_channel : DFSDM channel handle.
822 * @retval HAL status
823 */
824 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
825 {
826 HAL_StatusTypeDef status = HAL_OK;
827 uint32_t channel;
828
829 /* Check parameters */
830 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
831
832 /* Check DFSDM channel state */
833 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
834 {
835 /* Return error status */
836 status = HAL_ERROR;
837 }
838 else
839 {
840 /* Stop short circuit detection */
841 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
842
843 /* Clear short circuit detection flag */
844 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
845 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
846 }
847 /* Return function status */
848 return status;
849 }
850
851 /**
852 * @brief This function allows to start short circuit detection in interrupt mode.
853 * @note Same mode has to be used for all channels
854 * @param hdfsdm_channel : DFSDM channel handle.
855 * @param Threshold : Short circuit detector threshold.
856 * This parameter must be a number between Min_Data = 0 and Max_Data = 255.
857 * @param BreakSignal : Break signals assigned to short circuit event.
858 * This parameter can be a values combination of @ref DFSDM_BreakSignals.
859 * @retval HAL status
860 */
861 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
862 uint32_t Threshold,
863 uint32_t BreakSignal)
864 {
865 HAL_StatusTypeDef status = HAL_OK;
866
867 /* Check parameters */
868 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
869 assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
870 assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
871
872 /* Check DFSDM channel state */
873 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
874 {
875 /* Return error status */
876 status = HAL_ERROR;
877 }
878 else
879 {
880 /* Activate short circuit detection interrupt */
881 DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
882
883 /* Configure threshold and break signals */
884 hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
885 hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) | \
886 Threshold);
887
888 /* Start short circuit detection */
889 hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
890 }
891 /* Return function status */
892 return status;
893 }
894
895 /**
896 * @brief Short circuit detection callback.
897 * @param hdfsdm_channel : DFSDM channel handle.
898 * @retval None
899 */
900 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
901 {
902 /* Prevent unused argument(s) compilation warning */
903 UNUSED(hdfsdm_channel);
904
905 /* NOTE : This function should not be modified, when the callback is needed,
906 the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
907 */
908 }
909
910 /**
911 * @brief This function allows to stop short circuit detection in interrupt mode.
912 * @note Interrupt will be disabled for all channels
913 * @param hdfsdm_channel : DFSDM channel handle.
914 * @retval HAL status
915 */
916 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
917 {
918 HAL_StatusTypeDef status = HAL_OK;
919 uint32_t channel;
920
921 /* Check parameters */
922 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
923
924 /* Check DFSDM channel state */
925 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
926 {
927 /* Return error status */
928 status = HAL_ERROR;
929 }
930 else
931 {
932 /* Stop short circuit detection */
933 hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
934
935 /* Clear short circuit detection flag */
936 channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
937 DFSDM1_Filter0->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
938
939 /* Disable short circuit detection interrupt */
940 DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
941 }
942 /* Return function status */
943 return status;
944 }
945
946 /**
947 * @brief This function allows to get channel analog watchdog value.
948 * @param hdfsdm_channel : DFSDM channel handle.
949 * @retval Channel analog watchdog value.
950 */
951 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
952 {
953 return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
954 }
955
956 /**
957 * @brief This function allows to modify channel offset value.
958 * @param hdfsdm_channel : DFSDM channel handle.
959 * @param Offset : DFSDM channel offset.
960 * This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
961 * @retval HAL status.
962 */
963 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
964 int32_t Offset)
965 {
966 HAL_StatusTypeDef status = HAL_OK;
967
968 /* Check parameters */
969 assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
970 assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
971
972 /* Check DFSDM channel state */
973 if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
974 {
975 /* Return error status */
976 status = HAL_ERROR;
977 }
978 else
979 {
980 /* Modify channel offset */
981 hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
982 hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_OFFSET);
983 }
984 /* Return function status */
985 return status;
986 }
987
988 /**
989 * @}
990 */
991
992 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
993 * @brief Channel state function
994 *
995 @verbatim
996 ==============================================================================
997 ##### Channel state function #####
998 ==============================================================================
999 [..] This section provides function allowing to:
1000 (+) Get channel handle state.
1001 @endverbatim
1002 * @{
1003 */
1004
1005 /**
1006 * @brief This function allows to get the current DFSDM channel handle state.
1007 * @param hdfsdm_channel : DFSDM channel handle.
1008 * @retval DFSDM channel state.
1009 */
1010 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1011 {
1012 /* Return DFSDM channel handle state */
1013 return hdfsdm_channel->State;
1014 }
1015
1016 /**
1017 * @}
1018 */
1019
1020 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
1021 * @brief Filter initialization and de-initialization functions
1022 *
1023 @verbatim
1024 ==============================================================================
1025 ##### Filter initialization and de-initialization functions #####
1026 ==============================================================================
1027 [..] This section provides functions allowing to:
1028 (+) Initialize the DFSDM filter.
1029 (+) De-initialize the DFSDM filter.
1030 @endverbatim
1031 * @{
1032 */
1033
1034 /**
1035 * @brief Initialize the DFSDM filter according to the specified parameters
1036 * in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
1037 * @param hdfsdm_filter : DFSDM filter handle.
1038 * @retval HAL status.
1039 */
1040 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1041 {
1042 /* Check DFSDM Channel handle */
1043 if(hdfsdm_filter == NULL)
1044 {
1045 return HAL_ERROR;
1046 }
1047
1048 /* Check parameters */
1049 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1050 assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
1051 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
1052 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
1053 assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
1054 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
1055 assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
1056 assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
1057 assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
1058 assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
1059
1060 /* Check parameters compatibility */
1061 if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
1062 ((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) ||
1063 (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
1064 {
1065 return HAL_ERROR;
1066 }
1067
1068 /* Initialize DFSDM filter variables with default values */
1069 hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
1070 hdfsdm_filter->InjectedChannelsNbr = 1;
1071 hdfsdm_filter->InjConvRemaining = 1;
1072 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
1073
1074 /* Call MSP init function */
1075 HAL_DFSDM_FilterMspInit(hdfsdm_filter);
1076
1077 /* Set regular parameters */
1078 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
1079 if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
1080 {
1081 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
1082 }
1083 else
1084 {
1085 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
1086 }
1087
1088 if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
1089 {
1090 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
1091 }
1092 else
1093 {
1094 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
1095 }
1096
1097 /* Set injected parameters */
1098 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
1099 if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
1100 {
1101 assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
1102 assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
1103 hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
1104 }
1105
1106 if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
1107 {
1108 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
1109 }
1110 else
1111 {
1112 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
1113 }
1114
1115 if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
1116 {
1117 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
1118 }
1119 else
1120 {
1121 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
1122 }
1123
1124 /* Set filter parameters */
1125 hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
1126 hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
1127 ((hdfsdm_filter->Init.FilterParam.Oversampling - 1) << DFSDM_FLTFCR_FOSR_OFFSET) |
1128 (hdfsdm_filter->Init.FilterParam.IntOversampling - 1));
1129
1130 /* Store regular and injected triggers and injected scan mode*/
1131 hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
1132 hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
1133 hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
1134 hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
1135
1136 /* Enable DFSDM filter */
1137 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
1138
1139 /* Set DFSDM filter to ready state */
1140 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
1141
1142 return HAL_OK;
1143 }
1144
1145 /**
1146 * @brief De-initializes the DFSDM filter.
1147 * @param hdfsdm_filter : DFSDM filter handle.
1148 * @retval HAL status.
1149 */
1150 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1151 {
1152 /* Check DFSDM filter handle */
1153 if(hdfsdm_filter == NULL)
1154 {
1155 return HAL_ERROR;
1156 }
1157
1158 /* Check parameters */
1159 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1160
1161 /* Disable the DFSDM filter */
1162 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
1163
1164 /* Call MSP deinit function */
1165 HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
1166
1167 /* Set DFSDM filter in reset state */
1168 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
1169
1170 return HAL_OK;
1171 }
1172
1173 /**
1174 * @brief Initializes the DFSDM filter MSP.
1175 * @param hdfsdm_filter : DFSDM filter handle.
1176 * @retval None
1177 */
1178 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1179 {
1180 /* Prevent unused argument(s) compilation warning */
1181 UNUSED(hdfsdm_filter);
1182
1183 /* NOTE : This function should not be modified, when the function is needed,
1184 the HAL_DFSDM_FilterMspInit could be implemented in the user file.
1185 */
1186 }
1187
1188 /**
1189 * @brief De-initializes the DFSDM filter MSP.
1190 * @param hdfsdm_filter : DFSDM filter handle.
1191 * @retval None
1192 */
1193 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1194 {
1195 /* Prevent unused argument(s) compilation warning */
1196 UNUSED(hdfsdm_filter);
1197
1198 /* NOTE : This function should not be modified, when the function is needed,
1199 the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
1200 */
1201 }
1202
1203 /**
1204 * @}
1205 */
1206
1207 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
1208 * @brief Filter control functions
1209 *
1210 @verbatim
1211 ==============================================================================
1212 ##### Filter control functions #####
1213 ==============================================================================
1214 [..] This section provides functions allowing to:
1215 (+) Select channel and enable/disable continuous mode for regular conversion.
1216 (+) Select channels for injected conversion.
1217 @endverbatim
1218 * @{
1219 */
1220
1221 /**
1222 * @brief This function allows to select channel and to enable/disable
1223 * continuous mode for regular conversion.
1224 * @param hdfsdm_filter : DFSDM filter handle.
1225 * @param Channel : Channel for regular conversion.
1226 * This parameter can be a value of @ref DFSDM_Channel_Selection.
1227 * @param ContinuousMode : Enable/disable continuous mode for regular conversion.
1228 * This parameter can be a value of @ref DFSDM_ContinuousMode.
1229 * @retval HAL status
1230 */
1231 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1232 uint32_t Channel,
1233 uint32_t ContinuousMode)
1234 {
1235 HAL_StatusTypeDef status = HAL_OK;
1236
1237 /* Check parameters */
1238 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1239 assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
1240 assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
1241
1242 /* Check DFSDM filter state */
1243 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1244 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1245 {
1246 /* Configure channel and continuous mode for regular conversion */
1247 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
1248 if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
1249 {
1250 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
1251 DFSDM_FLTCR1_RCONT);
1252 }
1253 else
1254 {
1255 hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
1256 }
1257 /* Store continuous mode information */
1258 hdfsdm_filter->RegularContMode = ContinuousMode;
1259 }
1260 else
1261 {
1262 status = HAL_ERROR;
1263 }
1264
1265 /* Return function status */
1266 return status;
1267 }
1268
1269 /**
1270 * @brief This function allows to select channels for injected conversion.
1271 * @param hdfsdm_filter : DFSDM filter handle.
1272 * @param Channel : Channels for injected conversion.
1273 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
1274 * @retval HAL status
1275 */
1276 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1277 uint32_t Channel)
1278 {
1279 HAL_StatusTypeDef status = HAL_OK;
1280
1281 /* Check parameters */
1282 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1283 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
1284
1285 /* Check DFSDM filter state */
1286 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1287 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1288 {
1289 /* Configure channel for injected conversion */
1290 hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
1291 /* Store number of injected channels */
1292 hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
1293 /* Update number of injected channels remaining */
1294 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
1295 hdfsdm_filter->InjectedChannelsNbr : 1;
1296 }
1297 else
1298 {
1299 status = HAL_ERROR;
1300 }
1301 /* Return function status */
1302 return status;
1303 }
1304
1305 /**
1306 * @}
1307 */
1308
1309 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
1310 * @brief Filter operation functions
1311 *
1312 @verbatim
1313 ==============================================================================
1314 ##### Filter operation functions #####
1315 ==============================================================================
1316 [..] This section provides functions allowing to:
1317 (+) Start conversion of regular/injected channel.
1318 (+) Poll for the end of regular/injected conversion.
1319 (+) Stop conversion of regular/injected channel.
1320 (+) Start conversion of regular/injected channel and enable interrupt.
1321 (+) Call the callback functions at the end of regular/injected conversions.
1322 (+) Stop conversion of regular/injected channel and disable interrupt.
1323 (+) Start conversion of regular/injected channel and enable DMA transfer.
1324 (+) Stop conversion of regular/injected channel and disable DMA transfer.
1325 (+) Start analog watchdog and enable interrupt.
1326 (+) Call the callback function when analog watchdog occurs.
1327 (+) Stop analog watchdog and disable interrupt.
1328 (+) Start extreme detector.
1329 (+) Stop extreme detector.
1330 (+) Get result of regular channel conversion.
1331 (+) Get result of injected channel conversion.
1332 (+) Get extreme detector maximum and minimum values.
1333 (+) Get conversion time.
1334 (+) Handle DFSDM interrupt request.
1335 @endverbatim
1336 * @{
1337 */
1338
1339 /**
1340 * @brief This function allows to start regular conversion in polling mode.
1341 * @note This function should be called only when DFSDM filter instance is
1342 * in idle state or if injected conversion is ongoing.
1343 * @param hdfsdm_filter : DFSDM filter handle.
1344 * @retval HAL status
1345 */
1346 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1347 {
1348 HAL_StatusTypeDef status = HAL_OK;
1349
1350 /* Check parameters */
1351 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1352
1353 /* Check DFSDM filter state */
1354 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1355 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1356 {
1357 /* Start regular conversion */
1358 DFSDM_RegConvStart(hdfsdm_filter);
1359 }
1360 else
1361 {
1362 status = HAL_ERROR;
1363 }
1364 /* Return function status */
1365 return status;
1366 }
1367
1368 /**
1369 * @brief This function allows to poll for the end of regular conversion.
1370 * @note This function should be called only if regular conversion is ongoing.
1371 * @param hdfsdm_filter : DFSDM filter handle.
1372 * @param Timeout : Timeout value in milliseconds.
1373 * @retval HAL status
1374 */
1375 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1376 uint32_t Timeout)
1377 {
1378 uint32_t tickstart;
1379
1380 /* Check parameters */
1381 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1382
1383 /* Check DFSDM filter state */
1384 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1385 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1386 {
1387 /* Return error status */
1388 return HAL_ERROR;
1389 }
1390 else
1391 {
1392 /* Get timeout */
1393 tickstart = HAL_GetTick();
1394
1395 /* Wait end of regular conversion */
1396 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
1397 {
1398 /* Check the Timeout */
1399 if(Timeout != HAL_MAX_DELAY)
1400 {
1401 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
1402 {
1403 /* Return timeout status */
1404 return HAL_TIMEOUT;
1405 }
1406 }
1407 }
1408 /* Check if overrun occurs */
1409 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
1410 {
1411 /* Update error code and call error callback */
1412 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
1413 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
1414
1415 /* Clear regular overrun flag */
1416 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
1417 }
1418 /* Update DFSDM filter state only if not continuous conversion and SW trigger */
1419 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
1420 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
1421 {
1422 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
1423 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
1424 }
1425 /* Return function status */
1426 return HAL_OK;
1427 }
1428 }
1429
1430 /**
1431 * @brief This function allows to stop regular conversion in polling mode.
1432 * @note This function should be called only if regular conversion is ongoing.
1433 * @param hdfsdm_filter : DFSDM filter handle.
1434 * @retval HAL status
1435 */
1436 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1437 {
1438 HAL_StatusTypeDef status = HAL_OK;
1439
1440 /* Check parameters */
1441 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1442
1443 /* Check DFSDM filter state */
1444 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1445 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1446 {
1447 /* Return error status */
1448 status = HAL_ERROR;
1449 }
1450 else
1451 {
1452 /* Stop regular conversion */
1453 DFSDM_RegConvStop(hdfsdm_filter);
1454 }
1455 /* Return function status */
1456 return status;
1457 }
1458
1459 /**
1460 * @brief This function allows to start regular conversion in interrupt mode.
1461 * @note This function should be called only when DFSDM filter instance is
1462 * in idle state or if injected conversion is ongoing.
1463 * @param hdfsdm_filter : DFSDM filter handle.
1464 * @retval HAL status
1465 */
1466 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1467 {
1468 HAL_StatusTypeDef status = HAL_OK;
1469
1470 /* Check parameters */
1471 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1472
1473 /* Check DFSDM filter state */
1474 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1475 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1476 {
1477 /* Enable interrupts for regular conversions */
1478 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
1479
1480 /* Start regular conversion */
1481 DFSDM_RegConvStart(hdfsdm_filter);
1482 }
1483 else
1484 {
1485 status = HAL_ERROR;
1486 }
1487 /* Return function status */
1488 return status;
1489 }
1490
1491 /**
1492 * @brief This function allows to stop regular conversion in interrupt mode.
1493 * @note This function should be called only if regular conversion is ongoing.
1494 * @param hdfsdm_filter : DFSDM filter handle.
1495 * @retval HAL status
1496 */
1497 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1498 {
1499 HAL_StatusTypeDef status = HAL_OK;
1500
1501 /* Check parameters */
1502 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1503
1504 /* Check DFSDM filter state */
1505 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1506 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1507 {
1508 /* Return error status */
1509 status = HAL_ERROR;
1510 }
1511 else
1512 {
1513 /* Disable interrupts for regular conversions */
1514 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
1515
1516 /* Stop regular conversion */
1517 DFSDM_RegConvStop(hdfsdm_filter);
1518 }
1519 /* Return function status */
1520 return status;
1521 }
1522
1523 /**
1524 * @brief This function allows to start regular conversion in DMA mode.
1525 * @note This function should be called only when DFSDM filter instance is
1526 * in idle state or if injected conversion is ongoing.
1527 * Please note that data on buffer will contain signed regular conversion
1528 * value on 24 most significant bits and corresponding channel on 3 least
1529 * significant bits.
1530 * @param hdfsdm_filter : DFSDM filter handle.
1531 * @param pData : The destination buffer address.
1532 * @param Length : The length of data to be transferred from DFSDM filter to memory.
1533 * @retval HAL status
1534 */
1535 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1536 int32_t *pData,
1537 uint32_t Length)
1538 {
1539 HAL_StatusTypeDef status = HAL_OK;
1540
1541 /* Check parameters */
1542 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1543
1544 /* Check destination address and length */
1545 if((pData == NULL) || (Length == 0))
1546 {
1547 status = HAL_ERROR;
1548 }
1549 /* Check that DMA is enabled for regular conversion */
1550 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
1551 {
1552 status = HAL_ERROR;
1553 }
1554 /* Check parameters compatibility */
1555 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
1556 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
1557 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
1558 (Length != 1))
1559 {
1560 status = HAL_ERROR;
1561 }
1562 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
1563 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
1564 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
1565 {
1566 status = HAL_ERROR;
1567 }
1568 /* Check DFSDM filter state */
1569 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1570 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1571 {
1572 /* Set callbacks on DMA handler */
1573 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
1574 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
1575 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
1576 DFSDM_DMARegularHalfConvCplt : NULL;
1577
1578 /* Start DMA in interrupt mode */
1579 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
1580 (uint32_t) pData, Length) != HAL_OK)
1581 {
1582 /* Set DFSDM filter in error state */
1583 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
1584 status = HAL_ERROR;
1585 }
1586 else
1587 {
1588 /* Start regular conversion */
1589 DFSDM_RegConvStart(hdfsdm_filter);
1590 }
1591 }
1592 else
1593 {
1594 status = HAL_ERROR;
1595 }
1596 /* Return function status */
1597 return status;
1598 }
1599
1600 /**
1601 * @brief This function allows to start regular conversion in DMA mode and to get
1602 * only the 16 most significant bits of conversion.
1603 * @note This function should be called only when DFSDM filter instance is
1604 * in idle state or if injected conversion is ongoing.
1605 * Please note that data on buffer will contain signed 16 most significant
1606 * bits of regular conversion.
1607 * @param hdfsdm_filter : DFSDM filter handle.
1608 * @param pData : The destination buffer address.
1609 * @param Length : The length of data to be transferred from DFSDM filter to memory.
1610 * @retval HAL status
1611 */
1612 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1613 int16_t *pData,
1614 uint32_t Length)
1615 {
1616 HAL_StatusTypeDef status = HAL_OK;
1617
1618 /* Check parameters */
1619 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1620
1621 /* Check destination address and length */
1622 if((pData == NULL) || (Length == 0))
1623 {
1624 status = HAL_ERROR;
1625 }
1626 /* Check that DMA is enabled for regular conversion */
1627 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
1628 {
1629 status = HAL_ERROR;
1630 }
1631 /* Check parameters compatibility */
1632 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
1633 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
1634 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
1635 (Length != 1))
1636 {
1637 status = HAL_ERROR;
1638 }
1639 else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
1640 (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
1641 (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
1642 {
1643 status = HAL_ERROR;
1644 }
1645 /* Check DFSDM filter state */
1646 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1647 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1648 {
1649 /* Set callbacks on DMA handler */
1650 hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
1651 hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
1652 hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
1653 DFSDM_DMARegularHalfConvCplt : NULL;
1654
1655 /* Start DMA in interrupt mode */
1656 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2, \
1657 (uint32_t) pData, Length) != HAL_OK)
1658 {
1659 /* Set DFSDM filter in error state */
1660 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
1661 status = HAL_ERROR;
1662 }
1663 else
1664 {
1665 /* Start regular conversion */
1666 DFSDM_RegConvStart(hdfsdm_filter);
1667 }
1668 }
1669 else
1670 {
1671 status = HAL_ERROR;
1672 }
1673 /* Return function status */
1674 return status;
1675 }
1676
1677 /**
1678 * @brief This function allows to stop regular conversion in DMA mode.
1679 * @note This function should be called only if regular conversion is ongoing.
1680 * @param hdfsdm_filter : DFSDM filter handle.
1681 * @retval HAL status
1682 */
1683 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1684 {
1685 HAL_StatusTypeDef status = HAL_OK;
1686
1687 /* Check parameters */
1688 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1689
1690 /* Check DFSDM filter state */
1691 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1692 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1693 {
1694 /* Return error status */
1695 status = HAL_ERROR;
1696 }
1697 else
1698 {
1699 /* Stop current DMA transfer */
1700 if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
1701 {
1702 /* Set DFSDM filter in error state */
1703 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
1704 status = HAL_ERROR;
1705 }
1706 else
1707 {
1708 /* Stop regular conversion */
1709 DFSDM_RegConvStop(hdfsdm_filter);
1710 }
1711 }
1712 /* Return function status */
1713 return status;
1714 }
1715
1716 /**
1717 * @brief This function allows to get regular conversion value.
1718 * @param hdfsdm_filter : DFSDM filter handle.
1719 * @param Channel : Corresponding channel of regular conversion.
1720 * @retval Regular conversion value
1721 */
1722 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1723 uint32_t *Channel)
1724 {
1725 uint32_t reg = 0;
1726 int32_t value = 0;
1727
1728 /* Check parameters */
1729 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1730 assert_param(Channel != NULL);
1731
1732 /* Get value of data register for regular channel */
1733 reg = hdfsdm_filter->Instance->FLTRDATAR;
1734
1735 /* Extract channel and regular conversion value */
1736 *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
1737 value = ((reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_DATA_OFFSET);
1738
1739 /* return regular conversion value */
1740 return value;
1741 }
1742
1743 /**
1744 * @brief This function allows to start injected conversion in polling mode.
1745 * @note This function should be called only when DFSDM filter instance is
1746 * in idle state or if regular conversion is ongoing.
1747 * @param hdfsdm_filter : DFSDM filter handle.
1748 * @retval HAL status
1749 */
1750 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1751 {
1752 HAL_StatusTypeDef status = HAL_OK;
1753
1754 /* Check parameters */
1755 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1756
1757 /* Check DFSDM filter state */
1758 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1759 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
1760 {
1761 /* Start injected conversion */
1762 DFSDM_InjConvStart(hdfsdm_filter);
1763 }
1764 else
1765 {
1766 status = HAL_ERROR;
1767 }
1768 /* Return function status */
1769 return status;
1770 }
1771
1772 /**
1773 * @brief This function allows to poll for the end of injected conversion.
1774 * @note This function should be called only if injected conversion is ongoing.
1775 * @param hdfsdm_filter : DFSDM filter handle.
1776 * @param Timeout : Timeout value in milliseconds.
1777 * @retval HAL status
1778 */
1779 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1780 uint32_t Timeout)
1781 {
1782 uint32_t tickstart;
1783
1784 /* Check parameters */
1785 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1786
1787 /* Check DFSDM filter state */
1788 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
1789 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1790 {
1791 /* Return error status */
1792 return HAL_ERROR;
1793 }
1794 else
1795 {
1796 /* Get timeout */
1797 tickstart = HAL_GetTick();
1798
1799 /* Wait end of injected conversions */
1800 while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
1801 {
1802 /* Check the Timeout */
1803 if(Timeout != HAL_MAX_DELAY)
1804 {
1805 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
1806 {
1807 /* Return timeout status */
1808 return HAL_TIMEOUT;
1809 }
1810 }
1811 }
1812 /* Check if overrun occurs */
1813 if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
1814 {
1815 /* Update error code and call error callback */
1816 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
1817 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
1818
1819 /* Clear injected overrun flag */
1820 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
1821 }
1822
1823 /* Update remaining injected conversions */
1824 hdfsdm_filter->InjConvRemaining--;
1825 if(hdfsdm_filter->InjConvRemaining == 0)
1826 {
1827 /* Update DFSDM filter state only if trigger is software */
1828 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
1829 {
1830 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
1831 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
1832 }
1833
1834 /* end of injected sequence, reset the value */
1835 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
1836 hdfsdm_filter->InjectedChannelsNbr : 1;
1837 }
1838
1839 /* Return function status */
1840 return HAL_OK;
1841 }
1842 }
1843
1844 /**
1845 * @brief This function allows to stop injected conversion in polling mode.
1846 * @note This function should be called only if injected conversion is ongoing.
1847 * @param hdfsdm_filter : DFSDM filter handle.
1848 * @retval HAL status
1849 */
1850 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1851 {
1852 HAL_StatusTypeDef status = HAL_OK;
1853
1854 /* Check parameters */
1855 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1856
1857 /* Check DFSDM filter state */
1858 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
1859 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1860 {
1861 /* Return error status */
1862 status = HAL_ERROR;
1863 }
1864 else
1865 {
1866 /* Stop injected conversion */
1867 DFSDM_InjConvStop(hdfsdm_filter);
1868 }
1869 /* Return function status */
1870 return status;
1871 }
1872
1873 /**
1874 * @brief This function allows to start injected conversion in interrupt mode.
1875 * @note This function should be called only when DFSDM filter instance is
1876 * in idle state or if regular conversion is ongoing.
1877 * @param hdfsdm_filter : DFSDM filter handle.
1878 * @retval HAL status
1879 */
1880 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1881 {
1882 HAL_StatusTypeDef status = HAL_OK;
1883
1884 /* Check parameters */
1885 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1886
1887 /* Check DFSDM filter state */
1888 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1889 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
1890 {
1891 /* Enable interrupts for injected conversions */
1892 hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
1893
1894 /* Start injected conversion */
1895 DFSDM_InjConvStart(hdfsdm_filter);
1896 }
1897 else
1898 {
1899 status = HAL_ERROR;
1900 }
1901 /* Return function status */
1902 return status;
1903 }
1904
1905 /**
1906 * @brief This function allows to stop injected conversion in interrupt mode.
1907 * @note This function should be called only if injected conversion is ongoing.
1908 * @param hdfsdm_filter : DFSDM filter handle.
1909 * @retval HAL status
1910 */
1911 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1912 {
1913 HAL_StatusTypeDef status = HAL_OK;
1914
1915 /* Check parameters */
1916 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1917
1918 /* Check DFSDM filter state */
1919 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
1920 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1921 {
1922 /* Return error status */
1923 status = HAL_ERROR;
1924 }
1925 else
1926 {
1927 /* Disable interrupts for injected conversions */
1928 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
1929
1930 /* Stop injected conversion */
1931 DFSDM_InjConvStop(hdfsdm_filter);
1932 }
1933 /* Return function status */
1934 return status;
1935 }
1936
1937 /**
1938 * @brief This function allows to start injected conversion in DMA mode.
1939 * @note This function should be called only when DFSDM filter instance is
1940 * in idle state or if regular conversion is ongoing.
1941 * Please note that data on buffer will contain signed injected conversion
1942 * value on 24 most significant bits and corresponding channel on 3 least
1943 * significant bits.
1944 * @param hdfsdm_filter : DFSDM filter handle.
1945 * @param pData : The destination buffer address.
1946 * @param Length : The length of data to be transferred from DFSDM filter to memory.
1947 * @retval HAL status
1948 */
1949 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1950 int32_t *pData,
1951 uint32_t Length)
1952 {
1953 HAL_StatusTypeDef status = HAL_OK;
1954
1955 /* Check parameters */
1956 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1957
1958 /* Check destination address and length */
1959 if((pData == NULL) || (Length == 0))
1960 {
1961 status = HAL_ERROR;
1962 }
1963 /* Check that DMA is enabled for injected conversion */
1964 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
1965 {
1966 status = HAL_ERROR;
1967 }
1968 /* Check parameters compatibility */
1969 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
1970 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
1971 (Length > hdfsdm_filter->InjConvRemaining))
1972 {
1973 status = HAL_ERROR;
1974 }
1975 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
1976 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
1977 {
1978 status = HAL_ERROR;
1979 }
1980 /* Check DFSDM filter state */
1981 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1982 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
1983 {
1984 /* Set callbacks on DMA handler */
1985 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
1986 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
1987 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
1988 DFSDM_DMAInjectedHalfConvCplt : NULL;
1989
1990 /* Start DMA in interrupt mode */
1991 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
1992 (uint32_t) pData, Length) != HAL_OK)
1993 {
1994 /* Set DFSDM filter in error state */
1995 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
1996 status = HAL_ERROR;
1997 }
1998 else
1999 {
2000 /* Start injected conversion */
2001 DFSDM_InjConvStart(hdfsdm_filter);
2002 }
2003 }
2004 else
2005 {
2006 status = HAL_ERROR;
2007 }
2008 /* Return function status */
2009 return status;
2010 }
2011
2012 /**
2013 * @brief This function allows to start injected conversion in DMA mode and to get
2014 * only the 16 most significant bits of conversion.
2015 * @note This function should be called only when DFSDM filter instance is
2016 * in idle state or if regular conversion is ongoing.
2017 * Please note that data on buffer will contain signed 16 most significant
2018 * bits of injected conversion.
2019 * @param hdfsdm_filter : DFSDM filter handle.
2020 * @param pData : The destination buffer address.
2021 * @param Length : The length of data to be transferred from DFSDM filter to memory.
2022 * @retval HAL status
2023 */
2024 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2025 int16_t *pData,
2026 uint32_t Length)
2027 {
2028 HAL_StatusTypeDef status = HAL_OK;
2029
2030 /* Check parameters */
2031 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2032
2033 /* Check destination address and length */
2034 if((pData == NULL) || (Length == 0))
2035 {
2036 status = HAL_ERROR;
2037 }
2038 /* Check that DMA is enabled for injected conversion */
2039 else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2040 {
2041 status = HAL_ERROR;
2042 }
2043 /* Check parameters compatibility */
2044 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2045 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2046 (Length > hdfsdm_filter->InjConvRemaining))
2047 {
2048 status = HAL_ERROR;
2049 }
2050 else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2051 (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2052 {
2053 status = HAL_ERROR;
2054 }
2055 /* Check DFSDM filter state */
2056 else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2057 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2058 {
2059 /* Set callbacks on DMA handler */
2060 hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2061 hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2062 hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
2063 DFSDM_DMAInjectedHalfConvCplt : NULL;
2064
2065 /* Start DMA in interrupt mode */
2066 if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2, \
2067 (uint32_t) pData, Length) != HAL_OK)
2068 {
2069 /* Set DFSDM filter in error state */
2070 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2071 status = HAL_ERROR;
2072 }
2073 else
2074 {
2075 /* Start injected conversion */
2076 DFSDM_InjConvStart(hdfsdm_filter);
2077 }
2078 }
2079 else
2080 {
2081 status = HAL_ERROR;
2082 }
2083 /* Return function status */
2084 return status;
2085 }
2086
2087 /**
2088 * @brief This function allows to stop injected conversion in DMA mode.
2089 * @note This function should be called only if injected conversion is ongoing.
2090 * @param hdfsdm_filter : DFSDM filter handle.
2091 * @retval HAL status
2092 */
2093 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2094 {
2095 HAL_StatusTypeDef status = HAL_OK;
2096
2097 /* Check parameters */
2098 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2099
2100 /* Check DFSDM filter state */
2101 if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2102 (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2103 {
2104 /* Return error status */
2105 status = HAL_ERROR;
2106 }
2107 else
2108 {
2109 /* Stop current DMA transfer */
2110 if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
2111 {
2112 /* Set DFSDM filter in error state */
2113 hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2114 status = HAL_ERROR;
2115 }
2116 else
2117 {
2118 /* Stop regular conversion */
2119 DFSDM_InjConvStop(hdfsdm_filter);
2120 }
2121 }
2122 /* Return function status */
2123 return status;
2124 }
2125
2126 /**
2127 * @brief This function allows to get injected conversion value.
2128 * @param hdfsdm_filter : DFSDM filter handle.
2129 * @param Channel : Corresponding channel of injected conversion.
2130 * @retval Injected conversion value
2131 */
2132 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2133 uint32_t *Channel)
2134 {
2135 uint32_t reg = 0;
2136 int32_t value = 0;
2137
2138 /* Check parameters */
2139 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2140 assert_param(Channel != NULL);
2141
2142 /* Get value of data register for injected channel */
2143 reg = hdfsdm_filter->Instance->FLTJDATAR;
2144
2145 /* Extract channel and injected conversion value */
2146 *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
2147 value = ((reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_DATA_OFFSET);
2148
2149 /* return regular conversion value */
2150 return value;
2151 }
2152
2153 /**
2154 * @brief This function allows to start filter analog watchdog in interrupt mode.
2155 * @param hdfsdm_filter : DFSDM filter handle.
2156 * @param awdParam : DFSDM filter analog watchdog parameters.
2157 * @retval HAL status
2158 */
2159 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2160 DFSDM_Filter_AwdParamTypeDef *awdParam)
2161 {
2162 HAL_StatusTypeDef status = HAL_OK;
2163
2164 /* Check parameters */
2165 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2166 assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
2167 assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
2168 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
2169 assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
2170 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
2171 assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
2172
2173 /* Check DFSDM filter state */
2174 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2175 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2176 {
2177 /* Return error status */
2178 status = HAL_ERROR;
2179 }
2180 else
2181 {
2182 /* Set analog watchdog data source */
2183 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2184 hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
2185
2186 /* Set thresholds and break signals */
2187 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2188 hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_THRESHOLD_OFFSET) | \
2189 awdParam->HighBreakSignal);
2190 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2191 hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_THRESHOLD_OFFSET) | \
2192 awdParam->LowBreakSignal);
2193
2194 /* Set channels and interrupt for analog watchdog */
2195 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
2196 hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_OFFSET) | \
2197 DFSDM_FLTCR2_AWDIE);
2198 }
2199 /* Return function status */
2200 return status;
2201 }
2202
2203 /**
2204 * @brief This function allows to stop filter analog watchdog in interrupt mode.
2205 * @param hdfsdm_filter : DFSDM filter handle.
2206 * @retval HAL status
2207 */
2208 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2209 {
2210 HAL_StatusTypeDef status = HAL_OK;
2211
2212 /* Check parameters */
2213 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2214
2215 /* Check DFSDM filter state */
2216 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2217 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2218 {
2219 /* Return error status */
2220 status = HAL_ERROR;
2221 }
2222 else
2223 {
2224 /* Reset channels for analog watchdog and deactivate interrupt */
2225 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
2226
2227 /* Clear all analog watchdog flags */
2228 hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
2229
2230 /* Reset thresholds and break signals */
2231 hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2232 hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2233
2234 /* Reset analog watchdog data source */
2235 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2236 }
2237 /* Return function status */
2238 return status;
2239 }
2240
2241 /**
2242 * @brief This function allows to start extreme detector feature.
2243 * @param hdfsdm_filter : DFSDM filter handle.
2244 * @param Channel : Channels where extreme detector is enabled.
2245 * This parameter can be a values combination of @ref DFSDM_Channel_Selection.
2246 * @retval HAL status
2247 */
2248 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2249 uint32_t Channel)
2250 {
2251 HAL_StatusTypeDef status = HAL_OK;
2252
2253 /* Check parameters */
2254 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2255 assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
2256
2257 /* Check DFSDM filter state */
2258 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2259 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2260 {
2261 /* Return error status */
2262 status = HAL_ERROR;
2263 }
2264 else
2265 {
2266 /* Set channels for extreme detector */
2267 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2268 hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_OFFSET);
2269 }
2270 /* Return function status */
2271 return status;
2272 }
2273
2274 /**
2275 * @brief This function allows to stop extreme detector feature.
2276 * @param hdfsdm_filter : DFSDM filter handle.
2277 * @retval HAL status
2278 */
2279 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2280 {
2281 HAL_StatusTypeDef status = HAL_OK;
2282 __IO uint32_t reg1;
2283 __IO uint32_t reg2;
2284
2285 /* Check parameters */
2286 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2287
2288 /* Check DFSDM filter state */
2289 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2290 (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2291 {
2292 /* Return error status */
2293 status = HAL_ERROR;
2294 }
2295 else
2296 {
2297 /* Reset channels for extreme detector */
2298 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2299
2300 /* Clear extreme detector values */
2301 reg1 = hdfsdm_filter->Instance->FLTEXMAX;
2302 reg2 = hdfsdm_filter->Instance->FLTEXMIN;
2303 UNUSED(reg1); /* To avoid GCC warning */
2304 UNUSED(reg2); /* To avoid GCC warning */
2305 }
2306 /* Return function status */
2307 return status;
2308 }
2309
2310 /**
2311 * @brief This function allows to get extreme detector maximum value.
2312 * @param hdfsdm_filter : DFSDM filter handle.
2313 * @param Channel : Corresponding channel.
2314 * @retval Extreme detector maximum value
2315 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
2316 */
2317 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2318 uint32_t *Channel)
2319 {
2320 uint32_t reg = 0;
2321 int32_t value = 0;
2322
2323 /* Check parameters */
2324 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2325 assert_param(Channel != NULL);
2326
2327 /* Get value of extreme detector maximum register */
2328 reg = hdfsdm_filter->Instance->FLTEXMAX;
2329
2330 /* Extract channel and extreme detector maximum value */
2331 *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
2332 value = ((reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_DATA_OFFSET);
2333
2334 /* return extreme detector maximum value */
2335 return value;
2336 }
2337
2338 /**
2339 * @brief This function allows to get extreme detector minimum value.
2340 * @param hdfsdm_filter : DFSDM filter handle.
2341 * @param Channel : Corresponding channel.
2342 * @retval Extreme detector minimum value
2343 * This value is between Min_Data = -8388608 and Max_Data = 8388607.
2344 */
2345 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2346 uint32_t *Channel)
2347 {
2348 uint32_t reg = 0;
2349 int32_t value = 0;
2350
2351 /* Check parameters */
2352 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2353 assert_param(Channel != NULL);
2354
2355 /* Get value of extreme detector minimum register */
2356 reg = hdfsdm_filter->Instance->FLTEXMIN;
2357
2358 /* Extract channel and extreme detector minimum value */
2359 *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
2360 value = ((reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_DATA_OFFSET);
2361
2362 /* return extreme detector minimum value */
2363 return value;
2364 }
2365
2366 /**
2367 * @brief This function allows to get conversion time value.
2368 * @param hdfsdm_filter : DFSDM filter handle.
2369 * @retval Conversion time value
2370 * @note To get time in second, this value has to be divided by DFSDM clock frequency.
2371 */
2372 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2373 {
2374 uint32_t reg = 0;
2375 uint32_t value = 0;
2376
2377 /* Check parameters */
2378 assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2379
2380 /* Get value of conversion timer register */
2381 reg = hdfsdm_filter->Instance->FLTCNVTIMR;
2382
2383 /* Extract conversion time value */
2384 value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_DATA_OFFSET);
2385
2386 /* return extreme detector minimum value */
2387 return value;
2388 }
2389
2390 /**
2391 * @brief This function handles the DFSDM interrupts.
2392 * @param hdfsdm_filter : DFSDM filter handle.
2393 * @retval None
2394 */
2395 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2396 {
2397 /* Check if overrun occurs during regular conversion */
2398 if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0) && \
2399 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0))
2400 {
2401 /* Clear regular overrun flag */
2402 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
2403
2404 /* Update error code */
2405 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
2406
2407 /* Call error callback */
2408 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2409 }
2410 /* Check if overrun occurs during injected conversion */
2411 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0) && \
2412 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0))
2413 {
2414 /* Clear injected overrun flag */
2415 hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2416
2417 /* Update error code */
2418 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2419
2420 /* Call error callback */
2421 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2422 }
2423 /* Check if end of regular conversion */
2424 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0) && \
2425 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0))
2426 {
2427 /* Call regular conversion complete callback */
2428 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
2429
2430 /* End of conversion if mode is not continuous and software trigger */
2431 if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2432 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
2433 {
2434 /* Disable interrupts for regular conversions */
2435 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
2436
2437 /* Update DFSDM filter state */
2438 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
2439 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
2440 }
2441 }
2442 /* Check if end of injected conversion */
2443 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0) && \
2444 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0))
2445 {
2446 /* Call injected conversion complete callback */
2447 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
2448
2449 /* Update remaining injected conversions */
2450 hdfsdm_filter->InjConvRemaining--;
2451 if(hdfsdm_filter->InjConvRemaining == 0)
2452 {
2453 /* End of conversion if trigger is software */
2454 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2455 {
2456 /* Disable interrupts for injected conversions */
2457 hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
2458
2459 /* Update DFSDM filter state */
2460 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2461 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2462 }
2463 /* end of injected sequence, reset the value */
2464 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2465 hdfsdm_filter->InjectedChannelsNbr : 1;
2466 }
2467 }
2468 /* Check if analog watchdog occurs */
2469 else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0) && \
2470 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0))
2471 {
2472 uint32_t reg = 0;
2473 uint32_t threshold = 0;
2474 uint32_t channel = 0;
2475
2476 /* Get channel and threshold */
2477 reg = hdfsdm_filter->Instance->FLTAWSR;
2478 threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
2479 if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
2480 {
2481 reg = reg >> DFSDM_FLTAWSR_HIGH_OFFSET;
2482 }
2483 while((reg & 1) == 0)
2484 {
2485 channel++;
2486 reg = reg >> 1;
2487 }
2488 /* Clear analog watchdog flag */
2489 hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
2490 (1 << (DFSDM_FLTAWSR_HIGH_OFFSET + channel)) : \
2491 (1 << channel);
2492
2493 /* Call analog watchdog callback */
2494 HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
2495 }
2496 /* Check if clock absence occurs */
2497 else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
2498 ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0) && \
2499 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0))
2500 {
2501 uint32_t reg = 0;
2502 uint32_t channel = 0;
2503
2504 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
2505
2506 while(channel < DFSDM1_CHANNEL_NUMBER)
2507 {
2508 /* Check if flag is set and corresponding channel is enabled */
2509 if(((reg & 1) != 0) && (a_dfsdm1ChannelHandle[channel] != NULL))
2510 {
2511 /* Check clock absence has been enabled for this channel */
2512 if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0)
2513 {
2514 /* Clear clock absence flag */
2515 hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
2516
2517 /* Call clock absence callback */
2518 HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
2519 }
2520 }
2521 channel++;
2522 reg = reg >> 1;
2523 }
2524 }
2525 /* Check if short circuit detection occurs */
2526 else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
2527 ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0) && \
2528 ((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0))
2529 {
2530 uint32_t reg = 0;
2531 uint32_t channel = 0;
2532
2533 /* Get channel */
2534 reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
2535 while((reg & 1) == 0)
2536 {
2537 channel++;
2538 reg = reg >> 1;
2539 }
2540
2541 /* Clear short circuit detection flag */
2542 hdfsdm_filter->Instance->FLTICR = (1 << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
2543
2544 /* Call short circuit detection callback */
2545 HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
2546 }
2547 }
2548
2549 /**
2550 * @brief Regular conversion complete callback.
2551 * @note In interrupt mode, user has to read conversion value in this function
2552 * using HAL_DFSDM_FilterGetRegularValue.
2553 * @param hdfsdm_filter : DFSDM filter handle.
2554 * @retval None
2555 */
2556 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2557 {
2558 /* Prevent unused argument(s) compilation warning */
2559 UNUSED(hdfsdm_filter);
2560
2561 /* NOTE : This function should not be modified, when the callback is needed,
2562 the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
2563 */
2564 }
2565
2566 /**
2567 * @brief Half regular conversion complete callback.
2568 * @param hdfsdm_filter : DFSDM filter handle.
2569 * @retval None
2570 */
2571 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2572 {
2573 /* Prevent unused argument(s) compilation warning */
2574 UNUSED(hdfsdm_filter);
2575
2576 /* NOTE : This function should not be modified, when the callback is needed,
2577 the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
2578 */
2579 }
2580
2581 /**
2582 * @brief Injected conversion complete callback.
2583 * @note In interrupt mode, user has to read conversion value in this function
2584 * using HAL_DFSDM_FilterGetInjectedValue.
2585 * @param hdfsdm_filter : DFSDM filter handle.
2586 * @retval None
2587 */
2588 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2589 {
2590 /* Prevent unused argument(s) compilation warning */
2591 UNUSED(hdfsdm_filter);
2592
2593 /* NOTE : This function should not be modified, when the callback is needed,
2594 the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
2595 */
2596 }
2597
2598 /**
2599 * @brief Half injected conversion complete callback.
2600 * @param hdfsdm_filter : DFSDM filter handle.
2601 * @retval None
2602 */
2603 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2604 {
2605 /* Prevent unused argument(s) compilation warning */
2606 UNUSED(hdfsdm_filter);
2607
2608 /* NOTE : This function should not be modified, when the callback is needed,
2609 the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
2610 */
2611 }
2612
2613 /**
2614 * @brief Filter analog watchdog callback.
2615 * @param hdfsdm_filter : DFSDM filter handle.
2616 * @param Channel : Corresponding channel.
2617 * @param Threshold : Low or high threshold has been reached.
2618 * @retval None
2619 */
2620 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2621 uint32_t Channel, uint32_t Threshold)
2622 {
2623 /* Prevent unused argument(s) compilation warning */
2624 UNUSED(hdfsdm_filter);
2625 UNUSED(Channel);
2626 UNUSED(Threshold);
2627
2628 /* NOTE : This function should not be modified, when the callback is needed,
2629 the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
2630 */
2631 }
2632
2633 /**
2634 * @brief Error callback.
2635 * @param hdfsdm_filter : DFSDM filter handle.
2636 * @retval None
2637 */
2638 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2639 {
2640 /* Prevent unused argument(s) compilation warning */
2641 UNUSED(hdfsdm_filter);
2642
2643 /* NOTE : This function should not be modified, when the callback is needed,
2644 the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
2645 */
2646 }
2647
2648 /**
2649 * @}
2650 */
2651
2652 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
2653 * @brief Filter state functions
2654 *
2655 @verbatim
2656 ==============================================================================
2657 ##### Filter state functions #####
2658 ==============================================================================
2659 [..] This section provides functions allowing to:
2660 (+) Get the DFSDM filter state.
2661 (+) Get the DFSDM filter error.
2662 @endverbatim
2663 * @{
2664 */
2665
2666 /**
2667 * @brief This function allows to get the current DFSDM filter handle state.
2668 * @param hdfsdm_filter : DFSDM filter handle.
2669 * @retval DFSDM filter state.
2670 */
2671 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2672 {
2673 /* Return DFSDM filter handle state */
2674 return hdfsdm_filter->State;
2675 }
2676
2677 /**
2678 * @brief This function allows to get the current DFSDM filter error.
2679 * @param hdfsdm_filter : DFSDM filter handle.
2680 * @retval DFSDM filter error code.
2681 */
2682 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2683 {
2684 return hdfsdm_filter->ErrorCode;
2685 }
2686
2687 /**
2688 * @}
2689 */
2690
2691 /**
2692 * @}
2693 */
2694 /* End of exported functions -------------------------------------------------*/
2695
2696 /* Private functions ---------------------------------------------------------*/
2697 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
2698 * @{
2699 */
2700
2701 /**
2702 * @brief DMA half transfer complete callback for regular conversion.
2703 * @param hdma : DMA handle.
2704 * @retval None
2705 */
2706 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
2707 {
2708 /* Get DFSDM filter handle */
2709 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
2710
2711 /* Call regular half conversion complete callback */
2712 HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
2713 }
2714
2715 /**
2716 * @brief DMA transfer complete callback for regular conversion.
2717 * @param hdma : DMA handle.
2718 * @retval None
2719 */
2720 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
2721 {
2722 /* Get DFSDM filter handle */
2723 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
2724
2725 /* Call regular conversion complete callback */
2726 HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
2727 }
2728
2729 /**
2730 * @brief DMA half transfer complete callback for injected conversion.
2731 * @param hdma : DMA handle.
2732 * @retval None
2733 */
2734 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
2735 {
2736 /* Get DFSDM filter handle */
2737 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
2738
2739 /* Call injected half conversion complete callback */
2740 HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
2741 }
2742
2743 /**
2744 * @brief DMA transfer complete callback for injected conversion.
2745 * @param hdma : DMA handle.
2746 * @retval None
2747 */
2748 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
2749 {
2750 /* Get DFSDM filter handle */
2751 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
2752
2753 /* Call injected conversion complete callback */
2754 HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
2755 }
2756
2757 /**
2758 * @brief DMA error callback.
2759 * @param hdma : DMA handle.
2760 * @retval None
2761 */
2762 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
2763 {
2764 /* Get DFSDM filter handle */
2765 DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
2766
2767 /* Update error code */
2768 hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
2769
2770 /* Call error callback */
2771 HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2772 }
2773
2774 /**
2775 * @brief This function allows to get the number of injected channels.
2776 * @param Channels : bitfield of injected channels.
2777 * @retval Number of injected channels.
2778 */
2779 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
2780 {
2781 uint32_t nbChannels = 0;
2782 uint32_t tmp;
2783
2784 /* Get the number of channels from bitfield */
2785 tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
2786 while(tmp != 0)
2787 {
2788 if((tmp & 1) != 0)
2789 {
2790 nbChannels++;
2791 }
2792 tmp = (uint32_t) (tmp >> 1);
2793 }
2794 return nbChannels;
2795 }
2796
2797 /**
2798 * @brief This function allows to get the channel number from channel instance.
2799 * @param Instance : DFSDM channel instance.
2800 * @retval Channel number.
2801 */
2802 static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
2803 {
2804 uint32_t channel = 0xFF;
2805
2806 /* Get channel from instance */
2807 if(Instance == DFSDM1_Channel0)
2808 {
2809 channel = 0;
2810 }
2811 else if(Instance == DFSDM1_Channel1)
2812 {
2813 channel = 1;
2814 }
2815 else if(Instance == DFSDM1_Channel2)
2816 {
2817 channel = 2;
2818 }
2819 else if(Instance == DFSDM1_Channel3)
2820 {
2821 channel = 3;
2822 }
2823 else if(Instance == DFSDM1_Channel4)
2824 {
2825 channel = 4;
2826 }
2827 else if(Instance == DFSDM1_Channel5)
2828 {
2829 channel = 5;
2830 }
2831 else if(Instance == DFSDM1_Channel6)
2832 {
2833 channel = 6;
2834 }
2835 else if(Instance == DFSDM1_Channel7)
2836 {
2837 channel = 7;
2838 }
2839
2840 return channel;
2841 }
2842
2843 /**
2844 * @brief This function allows to really start regular conversion.
2845 * @param hdfsdm_filter : DFSDM filter handle.
2846 * @retval None
2847 */
2848 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
2849 {
2850 /* Check regular trigger */
2851 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
2852 {
2853 /* Software start of regular conversion */
2854 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
2855 }
2856 else /* synchronous trigger */
2857 {
2858 /* Disable DFSDM filter */
2859 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
2860
2861 /* Set RSYNC bit in DFSDM_FLTCR1 register */
2862 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
2863
2864 /* Enable DFSDM filter */
2865 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
2866
2867 /* If injected conversion was in progress, restart it */
2868 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
2869 {
2870 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2871 {
2872 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
2873 }
2874 /* Update remaining injected conversions */
2875 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2876 hdfsdm_filter->InjectedChannelsNbr : 1;
2877 }
2878 }
2879 /* Update DFSDM filter state */
2880 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
2881 HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
2882 }
2883
2884 /**
2885 * @brief This function allows to really stop regular conversion.
2886 * @param hdfsdm_filter : DFSDM filter handle.
2887 * @retval None
2888 */
2889 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
2890 {
2891 /* Disable DFSDM filter */
2892 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
2893
2894 /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
2895 if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
2896 {
2897 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
2898 }
2899
2900 /* Enable DFSDM filter */
2901 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
2902
2903 /* If injected conversion was in progress, restart it */
2904 if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
2905 {
2906 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2907 {
2908 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
2909 }
2910 /* Update remaining injected conversions */
2911 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2912 hdfsdm_filter->InjectedChannelsNbr : 1;
2913 }
2914
2915 /* Update DFSDM filter state */
2916 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
2917 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
2918 }
2919
2920 /**
2921 * @brief This function allows to really start injected conversion.
2922 * @param hdfsdm_filter : DFSDM filter handle.
2923 * @retval None
2924 */
2925 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
2926 {
2927 /* Check injected trigger */
2928 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2929 {
2930 /* Software start of injected conversion */
2931 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
2932 }
2933 else /* external or synchronous trigger */
2934 {
2935 /* Disable DFSDM filter */
2936 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
2937
2938 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
2939 {
2940 /* Set JSYNC bit in DFSDM_FLTCR1 register */
2941 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
2942 }
2943 else /* external trigger */
2944 {
2945 /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
2946 hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
2947 }
2948
2949 /* Enable DFSDM filter */
2950 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
2951
2952 /* If regular conversion was in progress, restart it */
2953 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
2954 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
2955 {
2956 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
2957 }
2958 }
2959 /* Update DFSDM filter state */
2960 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
2961 HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
2962 }
2963
2964 /**
2965 * @brief This function allows to really stop injected conversion.
2966 * @param hdfsdm_filter : DFSDM filter handle.
2967 * @retval None
2968 */
2969 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
2970 {
2971 /* Disable DFSDM filter */
2972 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
2973
2974 /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
2975 if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
2976 {
2977 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
2978 }
2979 else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
2980 {
2981 /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
2982 hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
2983 }
2984
2985 /* Enable DFSDM filter */
2986 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
2987
2988 /* If regular conversion was in progress, restart it */
2989 if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
2990 (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
2991 {
2992 hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
2993 }
2994
2995 /* Update remaining injected conversions */
2996 hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2997 hdfsdm_filter->InjectedChannelsNbr : 1;
2998
2999 /* Update DFSDM filter state */
3000 hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
3001 HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
3002 }
3003
3004 /**
3005 * @}
3006 */
3007 /* End of private functions --------------------------------------------------*/
3008
3009 /**
3010 * @}
3011 */
3012 #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
3013 #endif /* HAL_DFSDM_MODULE_ENABLED */
3014 /**
3015 * @}
3016 */
3017
3018 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Repo containing the code for the mTask system (see msc-thesis1617)