2 ******************************************************************************
3 * @file stm32f7xx_hal_i2c.c
4 * @author MCD Application Team
7 * @brief I2C HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral State and Errors functions
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
19 The I2C HAL driver can be used as follows:
21 (#) Declare a I2C_HandleTypeDef handle structure, for example:
22 I2C_HandleTypeDef hi2c;
24 (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
25 (##) Enable the I2Cx interface clock
26 (##) I2C pins configuration
27 (+++) Enable the clock for the I2C GPIOs
28 (+++) Configure I2C pins as alternate function open-drain
29 (##) NVIC configuration if you need to use interrupt process
30 (+++) Configure the I2Cx interrupt priority
31 (+++) Enable the NVIC I2C IRQ Channel
32 (##) DMA Configuration if you need to use DMA process
33 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
34 (+++) Enable the DMAx interface clock using
35 (+++) Configure the DMA handle parameters
36 (+++) Configure the DMA Tx or Rx stream
37 (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
38 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
39 the DMA Tx or Rx stream
41 (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode,
42 Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
44 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
45 (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
47 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
49 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
51 *** Polling mode IO operation ***
52 =================================
54 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
55 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
56 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
57 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
59 *** Polling mode IO MEM operation ***
60 =====================================
62 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
63 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
66 *** Interrupt mode IO operation ***
67 ===================================
69 (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
70 (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
71 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
72 (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
73 (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
74 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
75 (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
76 (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
77 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
78 (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
79 (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
80 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
81 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
82 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
83 (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
84 (+) End of abort process, HAL_I2C_MasterRxCpltCallback() or HAL_I2C_MasterTxCpltCallback() is executed and user can
85 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() or HAL_I2C_MasterTxCpltCallback()
86 (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
87 This action will inform Master to generate a Stop condition to discard the communication.
90 *** Interrupt mode IO sequential operation ***
91 ===================================
93 (@) These interfaces allow to manage a sequential transfer with a repeated start condition
94 when a direction change during transfer
96 (+) A specific option field manage the different steps of a sequential transfer
97 (+) Option field values are defined through I2C_XFEROPTIONS and are listed below:
98 (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
99 (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
100 and data to transfer without a final stop condition
101 (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
102 and with new data to transfer if the direction change or manage only the new data to transfer
103 if no direction change and without a final stop condition in both cases
104 (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
105 and with new data to transfer if the direction change or manage only the new data to transfer
106 if no direction change and with a final stop condition in both cases
108 (+) Differents sequential I2C interfaces are listed below:
109 (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
110 (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
111 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
112 (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
113 (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
114 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
115 (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
116 (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
117 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
118 (+++) mean HAL_I2C_MasterTxCpltCallback() in case of previous state was master transmit
119 (+++) mean HAL_I2c_MasterRxCpltCallback() in case of previous state was master receive
120 (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
121 (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
122 add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
123 (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
124 add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
125 (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
126 (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
127 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
128 (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
129 (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
130 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
131 (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
132 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
133 (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
134 (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
135 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
136 (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
137 This action will inform Master to generate a Stop condition to discard the communication.
139 *** Interrupt mode IO MEM operation ***
140 =======================================
142 (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
143 HAL_I2C_Mem_Write_IT()
144 (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
145 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
146 (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
147 HAL_I2C_Mem_Read_IT()
148 (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
149 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
150 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
151 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
153 *** DMA mode IO operation ***
154 ==============================
156 (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
157 HAL_I2C_Master_Transmit_DMA()
158 (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
159 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
160 (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
161 HAL_I2C_Master_Receive_DMA()
162 (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
163 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
164 (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
165 HAL_I2C_Slave_Transmit_DMA()
166 (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
167 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
168 (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
169 HAL_I2C_Slave_Receive_DMA()
170 (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
171 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
172 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
173 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
174 (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
175 (+) End of abort process, HAL_I2C_MasterRxCpltCallback() or HAL_I2C_MasterTxCpltCallback() is executed and user can
176 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() or HAL_I2C_MasterTxCpltCallback()
177 (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
178 This action will inform Master to generate a Stop condition to discard the communication.
180 *** DMA mode IO MEM operation ***
181 =================================
183 (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
184 HAL_I2C_Mem_Write_DMA()
185 (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
186 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
187 (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
188 HAL_I2C_Mem_Read_DMA()
189 (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
190 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
191 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
192 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
195 *** I2C HAL driver macros list ***
196 ==================================
198 Below the list of most used macros in I2C HAL driver.
200 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
201 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
202 (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode
203 (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not
204 (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
205 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
206 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
209 (@) You can refer to the I2C HAL driver header file for more useful macros
212 ******************************************************************************
215 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
217 * Redistribution and use in source and binary forms, with or without modification,
218 * are permitted provided that the following conditions are met:
219 * 1. Redistributions of source code must retain the above copyright notice,
220 * this list of conditions and the following disclaimer.
221 * 2. Redistributions in binary form must reproduce the above copyright notice,
222 * this list of conditions and the following disclaimer in the documentation
223 * and/or other materials provided with the distribution.
224 * 3. Neither the name of STMicroelectronics nor the names of its contributors
225 * may be used to endorse or promote products derived from this software
226 * without specific prior written permission.
228 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
229 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
230 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
231 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
232 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
233 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
234 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
235 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
236 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
237 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
239 ******************************************************************************
242 /* Includes ------------------------------------------------------------------*/
243 #include "stm32f7xx_hal.h"
245 /** @addtogroup STM32F7xx_HAL_Driver
249 /** @defgroup I2C I2C
250 * @brief I2C HAL module driver
254 #ifdef HAL_I2C_MODULE_ENABLED
256 /* Private typedef -----------------------------------------------------------*/
257 /* Private define ------------------------------------------------------------*/
259 /** @defgroup I2C_Private_Define I2C Private Define
262 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */
263 #define I2C_TIMEOUT_ADDR ((uint32_t)10000U) /*!< 10 s */
264 #define I2C_TIMEOUT_BUSY ((uint32_t)25U) /*!< 25 ms */
265 #define I2C_TIMEOUT_DIR ((uint32_t)25U) /*!< 25 ms */
266 #define I2C_TIMEOUT_RXNE ((uint32_t)25U) /*!< 25 ms */
267 #define I2C_TIMEOUT_STOPF ((uint32_t)25U) /*!< 25 ms */
268 #define I2C_TIMEOUT_TC ((uint32_t)25U) /*!< 25 ms */
269 #define I2C_TIMEOUT_TCR ((uint32_t)25U) /*!< 25 ms */
270 #define I2C_TIMEOUT_TXIS ((uint32_t)25U) /*!< 25 ms */
271 #define I2C_TIMEOUT_FLAG ((uint32_t)25U) /*!< 25 ms */
273 #define MAX_NBYTE_SIZE 255U
274 #define SlaveAddr_SHIFT 7U
275 #define SlaveAddr_MSK 0x06U
277 /* Private define for @ref PreviousState usage */
278 #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits */
279 #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
280 #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
281 #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
282 #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
283 #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
284 #define I2C_STATE_MEM_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) /*!< Memory Busy TX, combinaison of State LSB and Mode enum */
285 #define I2C_STATE_MEM_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) /*!< Memory Busy RX, combinaison of State LSB and Mode enum */
288 /* Private define to centralize the enable/disable of Interrupts */
289 #define I2C_XFER_TX_IT ((uint32_t)0x00000001)
290 #define I2C_XFER_RX_IT ((uint32_t)0x00000002)
291 #define I2C_XFER_LISTEN_IT ((uint32_t)0x00000004)
293 #define I2C_XFER_ERROR_IT ((uint32_t)0x00000011)
294 #define I2C_XFER_CPLT_IT ((uint32_t)0x00000012)
295 #define I2C_XFER_RELOAD_IT ((uint32_t)0x00000012)
300 /* Private macro -------------------------------------------------------------*/
301 #define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) ((((__HANDLE__)->State) == HAL_I2C_STATE_BUSY_TX) ? \
302 ((uint32_t)((__HANDLE__)->hdmatx->Instance->NDTR)) : \
303 ((uint32_t)((__HANDLE__)->hdmarx->Instance->NDTR)))
305 /* Private variables ---------------------------------------------------------*/
306 /* Private function prototypes -----------------------------------------------*/
308 /** @defgroup I2C_Private_Functions I2C Private Functions
311 /* Private functions to handle DMA transfer */
312 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef
*hdma
);
313 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef
*hdma
);
314 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef
*hdma
);
315 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef
*hdma
);
316 static void I2C_DMAError(DMA_HandleTypeDef
*hdma
);
317 static void I2C_DMAAbort(DMA_HandleTypeDef
*hdma
);
319 /* Private functions to handle IT transfer */
320 static void I2C_ITAddrCplt(I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
);
321 static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef
*hi2c
);
322 static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef
*hi2c
);
323 static void I2C_ITMasterCplt(I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
);
324 static void I2C_ITSlaveCplt(I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
);
325 static void I2C_ITListenCplt(I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
);
326 static void I2C_ITError(I2C_HandleTypeDef
*hi2c
, uint32_t ErrorCode
);
328 /* Private functions to handle IT transfer */
329 static HAL_StatusTypeDef
I2C_RequestMemoryWrite(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint32_t Timeout
, uint32_t Tickstart
);
330 static HAL_StatusTypeDef
I2C_RequestMemoryRead(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint32_t Timeout
, uint32_t Tickstart
);
332 /* Private functions for I2C transfer IRQ handler */
333 static HAL_StatusTypeDef
I2C_Master_ISR_IT(struct __I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
, uint32_t ITSources
);
334 static HAL_StatusTypeDef
I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
, uint32_t ITSources
);
335 static HAL_StatusTypeDef
I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
, uint32_t ITSources
);
336 static HAL_StatusTypeDef
I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
, uint32_t ITSources
);
338 /* Private functions to handle flags during polling transfer */
339 static HAL_StatusTypeDef
I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef
*hi2c
, uint32_t Flag
, FlagStatus Status
, uint32_t Timeout
, uint32_t Tickstart
);
340 static HAL_StatusTypeDef
I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef
*hi2c
, uint32_t Timeout
, uint32_t Tickstart
);
341 static HAL_StatusTypeDef
I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef
*hi2c
, uint32_t Timeout
, uint32_t Tickstart
);
342 static HAL_StatusTypeDef
I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef
*hi2c
, uint32_t Timeout
, uint32_t Tickstart
);
343 static HAL_StatusTypeDef
I2C_IsAcknowledgeFailed(I2C_HandleTypeDef
*hi2c
, uint32_t Timeout
, uint32_t Tickstart
);
345 /* Private functions to centralize the enable/disable of Interrupts */
346 static HAL_StatusTypeDef
I2C_Enable_IRQ(I2C_HandleTypeDef
*hi2c
, uint16_t InterruptRequest
);
347 static HAL_StatusTypeDef
I2C_Disable_IRQ(I2C_HandleTypeDef
*hi2c
, uint16_t InterruptRequest
);
349 /* Private functions to flush TXDR register */
350 static void I2C_Flush_TXDR(I2C_HandleTypeDef
*hi2c
);
352 /* Private functions to handle start, restart or stop a transfer */
353 static void I2C_TransferConfig(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t Size
, uint32_t Mode
, uint32_t Request
);
358 /* Exported functions --------------------------------------------------------*/
360 /** @defgroup I2C_Exported_Functions I2C Exported Functions
364 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
365 * @brief Initialization and Configuration functions
368 ===============================================================================
369 ##### Initialization and de-initialization functions #####
370 ===============================================================================
371 [..] This subsection provides a set of functions allowing to initialize and
372 deinitialize the I2Cx peripheral:
374 (+) User must Implement HAL_I2C_MspInit() function in which he configures
375 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
377 (+) Call the function HAL_I2C_Init() to configure the selected device with
378 the selected configuration:
381 (++) Addressing mode (Master, Slave)
382 (++) Dual Addressing mode
384 (++) Own Address 2 Mask
385 (++) General call mode
388 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
389 of the selected I2Cx peripheral.
396 * @brief Initializes the I2C according to the specified parameters
397 * in the I2C_InitTypeDef and initialize the associated handle.
398 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
399 * the configuration information for the specified I2C.
402 HAL_StatusTypeDef
HAL_I2C_Init(I2C_HandleTypeDef
*hi2c
)
404 /* Check the I2C handle allocation */
410 /* Check the parameters */
411 assert_param(IS_I2C_ALL_INSTANCE(hi2c
->Instance
));
412 assert_param(IS_I2C_OWN_ADDRESS1(hi2c
->Init
.OwnAddress1
));
413 assert_param(IS_I2C_ADDRESSING_MODE(hi2c
->Init
.AddressingMode
));
414 assert_param(IS_I2C_DUAL_ADDRESS(hi2c
->Init
.DualAddressMode
));
415 assert_param(IS_I2C_OWN_ADDRESS2(hi2c
->Init
.OwnAddress2
));
416 assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c
->Init
.OwnAddress2Masks
));
417 assert_param(IS_I2C_GENERAL_CALL(hi2c
->Init
.GeneralCallMode
));
418 assert_param(IS_I2C_NO_STRETCH(hi2c
->Init
.NoStretchMode
));
420 if(hi2c
->State
== HAL_I2C_STATE_RESET
)
422 /* Allocate lock resource and initialize it */
423 hi2c
->Lock
= HAL_UNLOCKED
;
425 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
426 HAL_I2C_MspInit(hi2c
);
429 hi2c
->State
= HAL_I2C_STATE_BUSY
;
431 /* Disable the selected I2C peripheral */
432 __HAL_I2C_DISABLE(hi2c
);
434 /*---------------------------- I2Cx TIMINGR Configuration ------------------*/
435 /* Configure I2Cx: Frequency range */
436 hi2c
->Instance
->TIMINGR
= hi2c
->Init
.Timing
& TIMING_CLEAR_MASK
;
438 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
439 /* Configure I2Cx: Own Address1 and ack own address1 mode */
440 hi2c
->Instance
->OAR1
&= ~I2C_OAR1_OA1EN
;
441 if(hi2c
->Init
.OwnAddress1
!= 0)
443 if(hi2c
->Init
.AddressingMode
== I2C_ADDRESSINGMODE_7BIT
)
445 hi2c
->Instance
->OAR1
= (I2C_OAR1_OA1EN
| hi2c
->Init
.OwnAddress1
);
447 else /* I2C_ADDRESSINGMODE_10BIT */
449 hi2c
->Instance
->OAR1
= (I2C_OAR1_OA1EN
| I2C_OAR1_OA1MODE
| hi2c
->Init
.OwnAddress1
);
453 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
454 /* Configure I2Cx: Addressing Master mode */
455 if(hi2c
->Init
.AddressingMode
== I2C_ADDRESSINGMODE_10BIT
)
457 hi2c
->Instance
->CR2
= (I2C_CR2_ADD10
);
459 /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
460 hi2c
->Instance
->CR2
|= (I2C_CR2_AUTOEND
| I2C_CR2_NACK
);
462 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
463 /* Configure I2Cx: Dual mode and Own Address2 */
464 hi2c
->Instance
->OAR2
= (hi2c
->Init
.DualAddressMode
| hi2c
->Init
.OwnAddress2
| (hi2c
->Init
.OwnAddress2Masks
<< 8));
466 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
467 /* Configure I2Cx: Generalcall and NoStretch mode */
468 hi2c
->Instance
->CR1
= (hi2c
->Init
.GeneralCallMode
| hi2c
->Init
.NoStretchMode
);
470 /* Enable the selected I2C peripheral */
471 __HAL_I2C_ENABLE(hi2c
);
473 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
474 hi2c
->State
= HAL_I2C_STATE_READY
;
475 hi2c
->PreviousState
= I2C_STATE_NONE
;
476 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
482 * @brief DeInitialize the I2C peripheral.
483 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
484 * the configuration information for the specified I2C.
487 HAL_StatusTypeDef
HAL_I2C_DeInit(I2C_HandleTypeDef
*hi2c
)
489 /* Check the I2C handle allocation */
495 /* Check the parameters */
496 assert_param(IS_I2C_ALL_INSTANCE(hi2c
->Instance
));
498 hi2c
->State
= HAL_I2C_STATE_BUSY
;
500 /* Disable the I2C Peripheral Clock */
501 __HAL_I2C_DISABLE(hi2c
);
503 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
504 HAL_I2C_MspDeInit(hi2c
);
506 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
507 hi2c
->State
= HAL_I2C_STATE_RESET
;
508 hi2c
->PreviousState
= I2C_STATE_NONE
;
509 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
518 * @brief Initialize the I2C MSP.
519 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
520 * the configuration information for the specified I2C.
523 __weak
void HAL_I2C_MspInit(I2C_HandleTypeDef
*hi2c
)
525 /* Prevent unused argument(s) compilation warning */
528 /* NOTE : This function should not be modified, when the callback is needed,
529 the HAL_I2C_MspInit could be implemented in the user file
534 * @brief DeInitialize the I2C MSP.
535 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
536 * the configuration information for the specified I2C.
539 __weak
void HAL_I2C_MspDeInit(I2C_HandleTypeDef
*hi2c
)
541 /* Prevent unused argument(s) compilation warning */
544 /* NOTE : This function should not be modified, when the callback is needed,
545 the HAL_I2C_MspDeInit could be implemented in the user file
553 /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
554 * @brief Data transfers functions
557 ===============================================================================
558 ##### IO operation functions #####
559 ===============================================================================
561 This subsection provides a set of functions allowing to manage the I2C data
564 (#) There are two modes of transfer:
565 (++) Blocking mode : The communication is performed in the polling mode.
566 The status of all data processing is returned by the same function
567 after finishing transfer.
568 (++) No-Blocking mode : The communication is performed using Interrupts
569 or DMA. These functions return the status of the transfer startup.
570 The end of the data processing will be indicated through the
571 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
574 (#) Blocking mode functions are :
575 (++) HAL_I2C_Master_Transmit()
576 (++) HAL_I2C_Master_Receive()
577 (++) HAL_I2C_Slave_Transmit()
578 (++) HAL_I2C_Slave_Receive()
579 (++) HAL_I2C_Mem_Write()
580 (++) HAL_I2C_Mem_Read()
581 (++) HAL_I2C_IsDeviceReady()
583 (#) No-Blocking mode functions with Interrupt are :
584 (++) HAL_I2C_Master_Transmit_IT()
585 (++) HAL_I2C_Master_Receive_IT()
586 (++) HAL_I2C_Slave_Transmit_IT()
587 (++) HAL_I2C_Slave_Receive_IT()
588 (++) HAL_I2C_Mem_Write_IT()
589 (++) HAL_I2C_Mem_Read_IT()
591 (#) No-Blocking mode functions with DMA are :
592 (++) HAL_I2C_Master_Transmit_DMA()
593 (++) HAL_I2C_Master_Receive_DMA()
594 (++) HAL_I2C_Slave_Transmit_DMA()
595 (++) HAL_I2C_Slave_Receive_DMA()
596 (++) HAL_I2C_Mem_Write_DMA()
597 (++) HAL_I2C_Mem_Read_DMA()
599 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
600 (++) HAL_I2C_MemTxCpltCallback()
601 (++) HAL_I2C_MemRxCpltCallback()
602 (++) HAL_I2C_MasterTxCpltCallback()
603 (++) HAL_I2C_MasterRxCpltCallback()
604 (++) HAL_I2C_SlaveTxCpltCallback()
605 (++) HAL_I2C_SlaveRxCpltCallback()
606 (++) HAL_I2C_ErrorCallback()
613 * @brief Transmits in master mode an amount of data in blocking mode.
614 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
615 * the configuration information for the specified I2C.
616 * @param DevAddress: Target device address
617 * @param pData: Pointer to data buffer
618 * @param Size: Amount of data to be sent
619 * @param Timeout: Timeout duration
622 HAL_StatusTypeDef
HAL_I2C_Master_Transmit(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t *pData
, uint16_t Size
, uint32_t Timeout
)
624 uint32_t tickstart
= 0;
626 if(hi2c
->State
== HAL_I2C_STATE_READY
)
631 /* Init tickstart for timeout management*/
632 tickstart
= HAL_GetTick();
634 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_BUSY
, SET
, I2C_TIMEOUT_BUSY
, tickstart
) != HAL_OK
)
639 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
640 hi2c
->Mode
= HAL_I2C_MODE_MASTER
;
641 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
643 /* Prepare transfer parameters */
644 hi2c
->pBuffPtr
= pData
;
645 hi2c
->XferCount
= Size
;
646 hi2c
->XferISR
= NULL
;
648 /* Send Slave Address */
649 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
650 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
652 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
653 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_RELOAD_MODE
, I2C_GENERATE_START_WRITE
);
657 hi2c
->XferSize
= hi2c
->XferCount
;
658 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_AUTOEND_MODE
, I2C_GENERATE_START_WRITE
);
661 while(hi2c
->XferSize
> 0)
663 /* Wait until TXIS flag is set */
664 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
666 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
675 /* Write data to TXDR */
676 hi2c
->Instance
->TXDR
= (*hi2c
->pBuffPtr
++);
680 if((hi2c
->XferSize
== 0) && (hi2c
->XferCount
!=0))
682 /* Wait until TCR flag is set */
683 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_TCR
, RESET
, Timeout
, tickstart
) != HAL_OK
)
688 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
690 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
691 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_RELOAD_MODE
, I2C_NO_STARTSTOP
);
695 hi2c
->XferSize
= hi2c
->XferCount
;
696 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_AUTOEND_MODE
, I2C_NO_STARTSTOP
);
701 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
702 /* Wait until STOPF flag is set */
703 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
705 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
715 /* Clear STOP Flag */
716 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
718 /* Clear Configuration Register 2 */
721 hi2c
->State
= HAL_I2C_STATE_READY
;
722 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
724 /* Process Unlocked */
736 * @brief Receives in master mode an amount of data in blocking mode.
737 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
738 * the configuration information for the specified I2C.
739 * @param DevAddress: Target device address
740 * @param pData: Pointer to data buffer
741 * @param Size: Amount of data to be sent
742 * @param Timeout: Timeout duration
745 HAL_StatusTypeDef
HAL_I2C_Master_Receive(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t *pData
, uint16_t Size
, uint32_t Timeout
)
747 uint32_t tickstart
= 0;
749 if(hi2c
->State
== HAL_I2C_STATE_READY
)
754 /* Init tickstart for timeout management*/
755 tickstart
= HAL_GetTick();
757 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_BUSY
, SET
, I2C_TIMEOUT_BUSY
, tickstart
) != HAL_OK
)
762 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
763 hi2c
->Mode
= HAL_I2C_MODE_MASTER
;
764 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
766 /* Prepare transfer parameters */
767 hi2c
->pBuffPtr
= pData
;
768 hi2c
->XferCount
= Size
;
769 hi2c
->XferISR
= NULL
;
771 /* Send Slave Address */
772 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
773 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
775 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
776 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_RELOAD_MODE
, I2C_GENERATE_START_READ
);
780 hi2c
->XferSize
= hi2c
->XferCount
;
781 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_AUTOEND_MODE
, I2C_GENERATE_START_READ
);
784 while(hi2c
->XferSize
> 0)
786 /* Wait until RXNE flag is set */
787 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
789 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
799 /* Read data from RXDR */
800 (*hi2c
->pBuffPtr
++) = hi2c
->Instance
->RXDR
;
804 if((hi2c
->XferSize
== 0) && (hi2c
->XferCount
!= 0))
806 /* Wait until TCR flag is set */
807 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_TCR
, RESET
, Timeout
, tickstart
) != HAL_OK
)
812 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
814 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
815 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_RELOAD_MODE
, I2C_NO_STARTSTOP
);
819 hi2c
->XferSize
= hi2c
->XferCount
;
820 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_AUTOEND_MODE
, I2C_NO_STARTSTOP
);
825 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
826 /* Wait until STOPF flag is set */
827 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
829 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
839 /* Clear STOP Flag */
840 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
842 /* Clear Configuration Register 2 */
845 hi2c
->State
= HAL_I2C_STATE_READY
;
846 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
848 /* Process Unlocked */
860 * @brief Transmits in slave mode an amount of data in blocking mode.
861 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
862 * the configuration information for the specified I2C.
863 * @param pData: Pointer to data buffer
864 * @param Size: Amount of data to be sent
865 * @param Timeout: Timeout duration
868 HAL_StatusTypeDef
HAL_I2C_Slave_Transmit(I2C_HandleTypeDef
*hi2c
, uint8_t *pData
, uint16_t Size
, uint32_t Timeout
)
870 uint32_t tickstart
= 0;
872 if(hi2c
->State
== HAL_I2C_STATE_READY
)
874 if((pData
== NULL
) || (Size
== 0))
881 /* Init tickstart for timeout management*/
882 tickstart
= HAL_GetTick();
884 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
885 hi2c
->Mode
= HAL_I2C_MODE_SLAVE
;
886 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
888 /* Prepare transfer parameters */
889 hi2c
->pBuffPtr
= pData
;
890 hi2c
->XferCount
= Size
;
891 hi2c
->XferISR
= NULL
;
893 /* Enable Address Acknowledge */
894 hi2c
->Instance
->CR2
&= ~I2C_CR2_NACK
;
896 /* Wait until ADDR flag is set */
897 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_ADDR
, RESET
, Timeout
, tickstart
) != HAL_OK
)
899 /* Disable Address Acknowledge */
900 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
904 /* Clear ADDR flag */
905 __HAL_I2C_CLEAR_FLAG(hi2c
,I2C_FLAG_ADDR
);
907 /* If 10bit addressing mode is selected */
908 if(hi2c
->Init
.AddressingMode
== I2C_ADDRESSINGMODE_10BIT
)
910 /* Wait until ADDR flag is set */
911 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_ADDR
, RESET
, Timeout
, tickstart
) != HAL_OK
)
913 /* Disable Address Acknowledge */
914 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
918 /* Clear ADDR flag */
919 __HAL_I2C_CLEAR_FLAG(hi2c
,I2C_FLAG_ADDR
);
922 /* Wait until DIR flag is set Transmitter mode */
923 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_DIR
, RESET
, Timeout
, tickstart
) != HAL_OK
)
925 /* Disable Address Acknowledge */
926 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
930 while(hi2c
->XferCount
> 0)
932 /* Wait until TXIS flag is set */
933 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
935 /* Disable Address Acknowledge */
936 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
938 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
948 /* Write data to TXDR */
949 hi2c
->Instance
->TXDR
= (*hi2c
->pBuffPtr
++);
953 /* Wait until STOP flag is set */
954 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
956 /* Disable Address Acknowledge */
957 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
959 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
961 /* Normal use case for Transmitter mode */
962 /* A NACK is generated to confirm the end of transfer */
963 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
971 /* Clear STOP flag */
972 __HAL_I2C_CLEAR_FLAG(hi2c
,I2C_FLAG_STOPF
);
974 /* Wait until BUSY flag is reset */
975 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_BUSY
, SET
, Timeout
, tickstart
) != HAL_OK
)
977 /* Disable Address Acknowledge */
978 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
982 /* Disable Address Acknowledge */
983 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
985 hi2c
->State
= HAL_I2C_STATE_READY
;
986 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
988 /* Process Unlocked */
1000 * @brief Receive in slave mode an amount of data in blocking mode
1001 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1002 * the configuration information for the specified I2C.
1003 * @param pData: Pointer to data buffer
1004 * @param Size: Amount of data to be sent
1005 * @param Timeout: Timeout duration
1006 * @retval HAL status
1008 HAL_StatusTypeDef
HAL_I2C_Slave_Receive(I2C_HandleTypeDef
*hi2c
, uint8_t *pData
, uint16_t Size
, uint32_t Timeout
)
1010 uint32_t tickstart
= 0;
1012 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1014 if((pData
== NULL
) || (Size
== 0))
1018 /* Process Locked */
1021 /* Init tickstart for timeout management*/
1022 tickstart
= HAL_GetTick();
1024 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
1025 hi2c
->Mode
= HAL_I2C_MODE_SLAVE
;
1026 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1028 /* Prepare transfer parameters */
1029 hi2c
->pBuffPtr
= pData
;
1030 hi2c
->XferCount
= Size
;
1031 hi2c
->XferISR
= NULL
;
1033 /* Enable Address Acknowledge */
1034 hi2c
->Instance
->CR2
&= ~I2C_CR2_NACK
;
1036 /* Wait until ADDR flag is set */
1037 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_ADDR
, RESET
, Timeout
, tickstart
) != HAL_OK
)
1039 /* Disable Address Acknowledge */
1040 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
1044 /* Clear ADDR flag */
1045 __HAL_I2C_CLEAR_FLAG(hi2c
,I2C_FLAG_ADDR
);
1047 /* Wait until DIR flag is reset Receiver mode */
1048 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_DIR
, SET
, Timeout
, tickstart
) != HAL_OK
)
1050 /* Disable Address Acknowledge */
1051 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
1055 while(hi2c
->XferCount
> 0)
1057 /* Wait until RXNE flag is set */
1058 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
1060 /* Disable Address Acknowledge */
1061 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
1063 /* Store Last receive data if any */
1064 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_RXNE
) == SET
)
1066 /* Read data from RXDR */
1067 (*hi2c
->pBuffPtr
++) = hi2c
->Instance
->RXDR
;
1071 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_TIMEOUT
)
1081 /* Read data from RXDR */
1082 (*hi2c
->pBuffPtr
++) = hi2c
->Instance
->RXDR
;
1086 /* Wait until STOP flag is set */
1087 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
1089 /* Disable Address Acknowledge */
1090 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
1092 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
1102 /* Clear STOP flag */
1103 __HAL_I2C_CLEAR_FLAG(hi2c
,I2C_FLAG_STOPF
);
1105 /* Wait until BUSY flag is reset */
1106 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_BUSY
, SET
, Timeout
, tickstart
) != HAL_OK
)
1108 /* Disable Address Acknowledge */
1109 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
1113 /* Disable Address Acknowledge */
1114 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
1116 hi2c
->State
= HAL_I2C_STATE_READY
;
1117 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
1119 /* Process Unlocked */
1131 * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
1132 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1133 * the configuration information for the specified I2C.
1134 * @param DevAddress: Target device address
1135 * @param pData: Pointer to data buffer
1136 * @param Size: Amount of data to be sent
1137 * @retval HAL status
1139 HAL_StatusTypeDef
HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t *pData
, uint16_t Size
)
1141 uint32_t xfermode
= 0;
1143 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1145 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_BUSY
) == SET
)
1150 /* Process Locked */
1153 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
1154 hi2c
->Mode
= HAL_I2C_MODE_MASTER
;
1155 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1157 /* Prepare transfer parameters */
1158 hi2c
->pBuffPtr
= pData
;
1159 hi2c
->XferCount
= Size
;
1160 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
1161 hi2c
->XferISR
= I2C_Master_ISR_IT
;
1163 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
1165 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
1166 xfermode
= I2C_RELOAD_MODE
;
1170 hi2c
->XferSize
= hi2c
->XferCount
;
1171 xfermode
= I2C_AUTOEND_MODE
;
1174 /* Send Slave Address */
1175 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
1176 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, xfermode
, I2C_GENERATE_START_WRITE
);
1178 /* Process Unlocked */
1181 /* Note : The I2C interrupts must be enabled after unlocking current process
1182 to avoid the risk of I2C interrupt handle execution before current
1185 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
1186 /* possible to enable all of these */
1187 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1188 I2C_Enable_IRQ(hi2c
, I2C_XFER_TX_IT
);
1199 * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
1200 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1201 * the configuration information for the specified I2C.
1202 * @param DevAddress: Target device address
1203 * @param pData: Pointer to data buffer
1204 * @param Size: Amount of data to be sent
1205 * @retval HAL status
1207 HAL_StatusTypeDef
HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t *pData
, uint16_t Size
)
1209 uint32_t xfermode
= 0;
1211 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1213 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_BUSY
) == SET
)
1218 /* Process Locked */
1221 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
1222 hi2c
->Mode
= HAL_I2C_MODE_MASTER
;
1223 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1225 /* Prepare transfer parameters */
1226 hi2c
->pBuffPtr
= pData
;
1227 hi2c
->XferCount
= Size
;
1228 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
1229 hi2c
->XferISR
= I2C_Master_ISR_IT
;
1231 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
1233 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
1234 xfermode
= I2C_RELOAD_MODE
;
1238 hi2c
->XferSize
= hi2c
->XferCount
;
1239 xfermode
= I2C_AUTOEND_MODE
;
1242 /* Send Slave Address */
1243 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
1244 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, xfermode
, I2C_GENERATE_START_READ
);
1246 /* Process Unlocked */
1249 /* Note : The I2C interrupts must be enabled after unlocking current process
1250 to avoid the risk of I2C interrupt handle execution before current
1253 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
1254 /* possible to enable all of these */
1255 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1256 I2C_Enable_IRQ(hi2c
, I2C_XFER_RX_IT
);
1267 * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
1268 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1269 * the configuration information for the specified I2C.
1270 * @param pData: Pointer to data buffer
1271 * @param Size: Amount of data to be sent
1272 * @retval HAL status
1274 HAL_StatusTypeDef
HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef
*hi2c
, uint8_t *pData
, uint16_t Size
)
1276 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1278 /* Process Locked */
1281 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
1282 hi2c
->Mode
= HAL_I2C_MODE_SLAVE
;
1283 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1285 /* Enable Address Acknowledge */
1286 hi2c
->Instance
->CR2
&= ~I2C_CR2_NACK
;
1288 /* Prepare transfer parameters */
1289 hi2c
->pBuffPtr
= pData
;
1290 hi2c
->XferCount
= Size
;
1291 hi2c
->XferSize
= hi2c
->XferCount
;
1292 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
1293 hi2c
->XferISR
= I2C_Slave_ISR_IT
;
1295 /* Process Unlocked */
1298 /* Note : The I2C interrupts must be enabled after unlocking current process
1299 to avoid the risk of I2C interrupt handle execution before current
1302 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
1303 /* possible to enable all of these */
1304 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1305 I2C_Enable_IRQ(hi2c
, I2C_XFER_TX_IT
| I2C_XFER_LISTEN_IT
);
1316 * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
1317 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1318 * the configuration information for the specified I2C.
1319 * @param pData: Pointer to data buffer
1320 * @param Size: Amount of data to be sent
1321 * @retval HAL status
1323 HAL_StatusTypeDef
HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef
*hi2c
, uint8_t *pData
, uint16_t Size
)
1325 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1327 /* Process Locked */
1330 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
1331 hi2c
->Mode
= HAL_I2C_MODE_SLAVE
;
1332 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1334 /* Enable Address Acknowledge */
1335 hi2c
->Instance
->CR2
&= ~I2C_CR2_NACK
;
1337 /* Prepare transfer parameters */
1338 hi2c
->pBuffPtr
= pData
;
1339 hi2c
->XferCount
= Size
;
1340 hi2c
->XferSize
= hi2c
->XferCount
;
1341 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
1342 hi2c
->XferISR
= I2C_Slave_ISR_IT
;
1344 /* Process Unlocked */
1347 /* Note : The I2C interrupts must be enabled after unlocking current process
1348 to avoid the risk of I2C interrupt handle execution before current
1351 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
1352 /* possible to enable all of these */
1353 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1354 I2C_Enable_IRQ(hi2c
, I2C_XFER_RX_IT
| I2C_XFER_LISTEN_IT
);
1365 * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
1366 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1367 * the configuration information for the specified I2C.
1368 * @param DevAddress: Target device address
1369 * @param pData: Pointer to data buffer
1370 * @param Size: Amount of data to be sent
1371 * @retval HAL status
1373 HAL_StatusTypeDef
HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t *pData
, uint16_t Size
)
1375 uint32_t xfermode
= 0;
1377 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1379 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_BUSY
) == SET
)
1384 /* Process Locked */
1387 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
1388 hi2c
->Mode
= HAL_I2C_MODE_MASTER
;
1389 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1391 /* Prepare transfer parameters */
1392 hi2c
->pBuffPtr
= pData
;
1393 hi2c
->XferCount
= Size
;
1394 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
1395 hi2c
->XferISR
= I2C_Master_ISR_DMA
;
1397 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
1399 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
1400 xfermode
= I2C_RELOAD_MODE
;
1404 hi2c
->XferSize
= hi2c
->XferCount
;
1405 xfermode
= I2C_AUTOEND_MODE
;
1408 /* Set the I2C DMA transfer complete callback */
1409 hi2c
->hdmatx
->XferCpltCallback
= I2C_DMAMasterTransmitCplt
;
1411 /* Set the DMA error callback */
1412 hi2c
->hdmatx
->XferErrorCallback
= I2C_DMAError
;
1414 /* Set the unused DMA callbacks to NULL */
1415 hi2c
->hdmatx
->XferHalfCpltCallback
= NULL
;
1416 hi2c
->hdmatx
->XferAbortCallback
= NULL
;
1418 /* Enable the DMA channel */
1419 HAL_DMA_Start_IT(hi2c
->hdmatx
, (uint32_t)pData
, (uint32_t)&hi2c
->Instance
->TXDR
, hi2c
->XferSize
);
1421 /* Send Slave Address */
1422 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
1423 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, xfermode
, I2C_GENERATE_START_WRITE
);
1425 /* Update XferCount value */
1426 hi2c
->XferCount
-= hi2c
->XferSize
;
1428 /* Process Unlocked */
1431 /* Note : The I2C interrupts must be enabled after unlocking current process
1432 to avoid the risk of I2C interrupt handle execution before current
1434 /* Enable ERR and NACK interrupts */
1435 I2C_Enable_IRQ(hi2c
, I2C_XFER_ERROR_IT
);
1437 /* Enable DMA Request */
1438 hi2c
->Instance
->CR1
|= I2C_CR1_TXDMAEN
;
1449 * @brief Receive in master mode an amount of data in non-blocking mode with DMA
1450 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1451 * the configuration information for the specified I2C.
1452 * @param DevAddress: Target device address
1453 * @param pData: Pointer to data buffer
1454 * @param Size: Amount of data to be sent
1455 * @retval HAL status
1457 HAL_StatusTypeDef
HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t *pData
, uint16_t Size
)
1459 uint32_t xfermode
= 0;
1461 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1463 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_BUSY
) == SET
)
1468 /* Process Locked */
1471 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
1472 hi2c
->Mode
= HAL_I2C_MODE_MASTER
;
1473 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1475 /* Prepare transfer parameters */
1476 hi2c
->pBuffPtr
= pData
;
1477 hi2c
->XferCount
= Size
;
1478 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
1479 hi2c
->XferISR
= I2C_Master_ISR_DMA
;
1481 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
1483 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
1484 xfermode
= I2C_RELOAD_MODE
;
1488 hi2c
->XferSize
= hi2c
->XferCount
;
1489 xfermode
= I2C_AUTOEND_MODE
;
1492 if(hi2c
->XferSize
> 0)
1494 /* Set the I2C DMA transfer complete callback */
1495 hi2c
->hdmarx
->XferCpltCallback
= I2C_DMAMasterReceiveCplt
;
1497 /* Set the DMA error callback */
1498 hi2c
->hdmarx
->XferErrorCallback
= I2C_DMAError
;
1500 /* Set the unused DMA callbacks to NULL */
1501 hi2c
->hdmarx
->XferHalfCpltCallback
= NULL
;
1502 hi2c
->hdmarx
->XferAbortCallback
= NULL
;
1504 /* Enable the DMA channel */
1505 HAL_DMA_Start_IT(hi2c
->hdmarx
, (uint32_t)&hi2c
->Instance
->RXDR
, (uint32_t)pData
, hi2c
->XferSize
);
1507 /* Send Slave Address */
1508 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
1509 I2C_TransferConfig(hi2c
,DevAddress
,hi2c
->XferSize
, xfermode
, I2C_GENERATE_START_READ
);
1511 /* Update XferCount value */
1512 hi2c
->XferCount
-= hi2c
->XferSize
;
1514 /* Process Unlocked */
1517 /* Note : The I2C interrupts must be enabled after unlocking current process
1518 to avoid the risk of I2C interrupt handle execution before current
1520 /* Enable ERR and NACK interrupts */
1521 I2C_Enable_IRQ(hi2c
, I2C_XFER_ERROR_IT
);
1523 /* Enable DMA Request */
1524 hi2c
->Instance
->CR1
|= I2C_CR1_RXDMAEN
;
1528 hi2c
->State
= HAL_I2C_STATE_READY
;
1529 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
1531 /* Process Unlocked */
1543 * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
1544 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1545 * the configuration information for the specified I2C.
1546 * @param pData: Pointer to data buffer
1547 * @param Size: Amount of data to be sent
1548 * @retval HAL status
1550 HAL_StatusTypeDef
HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef
*hi2c
, uint8_t *pData
, uint16_t Size
)
1552 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1554 if((pData
== NULL
) || (Size
== 0))
1558 /* Process Locked */
1561 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
1562 hi2c
->Mode
= HAL_I2C_MODE_SLAVE
;
1563 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1565 /* Prepare transfer parameters */
1566 hi2c
->pBuffPtr
= pData
;
1567 hi2c
->XferCount
= Size
;
1568 hi2c
->XferSize
= hi2c
->XferCount
;
1569 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
1570 hi2c
->XferISR
= I2C_Slave_ISR_DMA
;
1572 /* Set the I2C DMA transfer complete callback */
1573 hi2c
->hdmatx
->XferCpltCallback
= I2C_DMASlaveTransmitCplt
;
1575 /* Set the DMA error callback */
1576 hi2c
->hdmatx
->XferErrorCallback
= I2C_DMAError
;
1578 /* Set the unused DMA callbacks to NULL */
1579 hi2c
->hdmatx
->XferHalfCpltCallback
= NULL
;
1580 hi2c
->hdmatx
->XferAbortCallback
= NULL
;
1582 /* Enable the DMA channel */
1583 HAL_DMA_Start_IT(hi2c
->hdmatx
, (uint32_t)pData
, (uint32_t)&hi2c
->Instance
->TXDR
, hi2c
->XferSize
);
1585 /* Enable Address Acknowledge */
1586 hi2c
->Instance
->CR2
&= ~I2C_CR2_NACK
;
1588 /* Process Unlocked */
1591 /* Note : The I2C interrupts must be enabled after unlocking current process
1592 to avoid the risk of I2C interrupt handle execution before current
1594 /* Enable ERR, STOP, NACK, ADDR interrupts */
1595 I2C_Enable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
);
1597 /* Enable DMA Request */
1598 hi2c
->Instance
->CR1
|= I2C_CR1_TXDMAEN
;
1609 * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
1610 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1611 * the configuration information for the specified I2C.
1612 * @param pData: Pointer to data buffer
1613 * @param Size: Amount of data to be sent
1614 * @retval HAL status
1616 HAL_StatusTypeDef
HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef
*hi2c
, uint8_t *pData
, uint16_t Size
)
1618 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1620 if((pData
== NULL
) || (Size
== 0))
1624 /* Process Locked */
1627 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
1628 hi2c
->Mode
= HAL_I2C_MODE_SLAVE
;
1629 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1631 /* Prepare transfer parameters */
1632 hi2c
->pBuffPtr
= pData
;
1633 hi2c
->XferCount
= Size
;
1634 hi2c
->XferSize
= hi2c
->XferCount
;
1635 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
1636 hi2c
->XferISR
= I2C_Slave_ISR_DMA
;
1638 /* Set the I2C DMA transfer complete callback */
1639 hi2c
->hdmarx
->XferCpltCallback
= I2C_DMASlaveReceiveCplt
;
1641 /* Set the DMA error callback */
1642 hi2c
->hdmarx
->XferErrorCallback
= I2C_DMAError
;
1644 /* Set the unused DMA callbacks to NULL */
1645 hi2c
->hdmarx
->XferHalfCpltCallback
= NULL
;
1646 hi2c
->hdmarx
->XferAbortCallback
= NULL
;
1648 /* Enable the DMA channel */
1649 HAL_DMA_Start_IT(hi2c
->hdmarx
, (uint32_t)&hi2c
->Instance
->RXDR
, (uint32_t)pData
, hi2c
->XferSize
);
1651 /* Enable Address Acknowledge */
1652 hi2c
->Instance
->CR2
&= ~I2C_CR2_NACK
;
1654 /* Process Unlocked */
1657 /* Note : The I2C interrupts must be enabled after unlocking current process
1658 to avoid the risk of I2C interrupt handle execution before current
1660 /* Enable ERR, STOP, NACK, ADDR interrupts */
1661 I2C_Enable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
);
1663 /* Enable DMA Request */
1664 hi2c
->Instance
->CR1
|= I2C_CR1_RXDMAEN
;
1674 * @brief Write an amount of data in blocking mode to a specific memory address
1675 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1676 * the configuration information for the specified I2C.
1677 * @param DevAddress: Target device address
1678 * @param MemAddress: Internal memory address
1679 * @param MemAddSize: Size of internal memory address
1680 * @param pData: Pointer to data buffer
1681 * @param Size: Amount of data to be sent
1682 * @param Timeout: Timeout duration
1683 * @retval HAL status
1685 HAL_StatusTypeDef
HAL_I2C_Mem_Write(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint8_t *pData
, uint16_t Size
, uint32_t Timeout
)
1687 uint32_t tickstart
= 0;
1689 /* Check the parameters */
1690 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize
));
1692 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1694 if((pData
== NULL
) || (Size
== 0))
1699 /* Process Locked */
1702 /* Init tickstart for timeout management*/
1703 tickstart
= HAL_GetTick();
1705 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_BUSY
, SET
, I2C_TIMEOUT_BUSY
, tickstart
) != HAL_OK
)
1710 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
1711 hi2c
->Mode
= HAL_I2C_MODE_MEM
;
1712 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1714 /* Prepare transfer parameters */
1715 hi2c
->pBuffPtr
= pData
;
1716 hi2c
->XferCount
= Size
;
1717 hi2c
->XferISR
= NULL
;
1719 /* Send Slave Address and Memory Address */
1720 if(I2C_RequestMemoryWrite(hi2c
, DevAddress
, MemAddress
, MemAddSize
, Timeout
, tickstart
) != HAL_OK
)
1722 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
1724 /* Process Unlocked */
1730 /* Process Unlocked */
1736 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */
1737 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
1739 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
1740 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_RELOAD_MODE
, I2C_NO_STARTSTOP
);
1744 hi2c
->XferSize
= hi2c
->XferCount
;
1745 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_AUTOEND_MODE
, I2C_NO_STARTSTOP
);
1750 /* Wait until TXIS flag is set */
1751 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
1753 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
1763 /* Write data to TXDR */
1764 hi2c
->Instance
->TXDR
= (*hi2c
->pBuffPtr
++);
1768 if((hi2c
->XferSize
== 0) && (hi2c
->XferCount
!=0))
1770 /* Wait until TCR flag is set */
1771 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_TCR
, RESET
, Timeout
, tickstart
) != HAL_OK
)
1776 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
1778 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
1779 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_RELOAD_MODE
, I2C_NO_STARTSTOP
);
1783 hi2c
->XferSize
= hi2c
->XferCount
;
1784 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_AUTOEND_MODE
, I2C_NO_STARTSTOP
);
1788 }while(hi2c
->XferCount
> 0);
1790 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
1791 /* Wait until STOPF flag is reset */
1792 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
1794 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
1804 /* Clear STOP Flag */
1805 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
1807 /* Clear Configuration Register 2 */
1808 I2C_RESET_CR2(hi2c
);
1810 hi2c
->State
= HAL_I2C_STATE_READY
;
1811 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
1813 /* Process Unlocked */
1825 * @brief Read an amount of data in blocking mode from a specific memory address
1826 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1827 * the configuration information for the specified I2C.
1828 * @param DevAddress: Target device address
1829 * @param MemAddress: Internal memory address
1830 * @param MemAddSize: Size of internal memory address
1831 * @param pData: Pointer to data buffer
1832 * @param Size: Amount of data to be sent
1833 * @param Timeout: Timeout duration
1834 * @retval HAL status
1836 HAL_StatusTypeDef
HAL_I2C_Mem_Read(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint8_t *pData
, uint16_t Size
, uint32_t Timeout
)
1838 uint32_t tickstart
= 0;
1840 /* Check the parameters */
1841 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize
));
1843 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1845 if((pData
== NULL
) || (Size
== 0))
1850 /* Process Locked */
1853 /* Init tickstart for timeout management*/
1854 tickstart
= HAL_GetTick();
1856 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_BUSY
, SET
, I2C_TIMEOUT_BUSY
, tickstart
) != HAL_OK
)
1861 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
1862 hi2c
->Mode
= HAL_I2C_MODE_MEM
;
1863 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
1865 /* Prepare transfer parameters */
1866 hi2c
->pBuffPtr
= pData
;
1867 hi2c
->XferCount
= Size
;
1868 hi2c
->XferISR
= NULL
;
1870 /* Send Slave Address and Memory Address */
1871 if(I2C_RequestMemoryRead(hi2c
, DevAddress
, MemAddress
, MemAddSize
, Timeout
, tickstart
) != HAL_OK
)
1873 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
1875 /* Process Unlocked */
1881 /* Process Unlocked */
1887 /* Send Slave Address */
1888 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
1889 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
1891 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
1892 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_RELOAD_MODE
, I2C_GENERATE_START_READ
);
1896 hi2c
->XferSize
= hi2c
->XferCount
;
1897 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_AUTOEND_MODE
, I2C_GENERATE_START_READ
);
1902 /* Wait until RXNE flag is set */
1903 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_RXNE
, RESET
, Timeout
, tickstart
) != HAL_OK
)
1908 /* Read data from RXDR */
1909 (*hi2c
->pBuffPtr
++) = hi2c
->Instance
->RXDR
;
1913 if((hi2c
->XferSize
== 0) && (hi2c
->XferCount
!= 0))
1915 /* Wait until TCR flag is set */
1916 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_TCR
, RESET
, Timeout
, tickstart
) != HAL_OK
)
1921 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
1923 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
1924 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_RELOAD_MODE
, I2C_NO_STARTSTOP
);
1928 hi2c
->XferSize
= hi2c
->XferCount
;
1929 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, I2C_AUTOEND_MODE
, I2C_NO_STARTSTOP
);
1932 }while(hi2c
->XferCount
> 0);
1934 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
1935 /* Wait until STOPF flag is reset */
1936 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c
, Timeout
, tickstart
) != HAL_OK
)
1938 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
1948 /* Clear STOP Flag */
1949 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
1951 /* Clear Configuration Register 2 */
1952 I2C_RESET_CR2(hi2c
);
1954 hi2c
->State
= HAL_I2C_STATE_READY
;
1955 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
1957 /* Process Unlocked */
1968 * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
1969 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
1970 * the configuration information for the specified I2C.
1971 * @param DevAddress: Target device address
1972 * @param MemAddress: Internal memory address
1973 * @param MemAddSize: Size of internal memory address
1974 * @param pData: Pointer to data buffer
1975 * @param Size: Amount of data to be sent
1976 * @retval HAL status
1978 HAL_StatusTypeDef
HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint8_t *pData
, uint16_t Size
)
1980 uint32_t tickstart
= 0;
1981 uint32_t xfermode
= 0;
1983 /* Check the parameters */
1984 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize
));
1986 if(hi2c
->State
== HAL_I2C_STATE_READY
)
1988 if((pData
== NULL
) || (Size
== 0))
1993 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_BUSY
) == SET
)
1998 /* Process Locked */
2001 /* Init tickstart for timeout management*/
2002 tickstart
= HAL_GetTick();
2004 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
2005 hi2c
->Mode
= HAL_I2C_MODE_MEM
;
2006 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
2008 /* Prepare transfer parameters */
2009 hi2c
->pBuffPtr
= pData
;
2010 hi2c
->XferCount
= Size
;
2011 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
2012 hi2c
->XferISR
= I2C_Master_ISR_IT
;
2014 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
2016 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
2017 xfermode
= I2C_RELOAD_MODE
;
2021 hi2c
->XferSize
= hi2c
->XferCount
;
2022 xfermode
= I2C_AUTOEND_MODE
;
2025 /* Send Slave Address and Memory Address */
2026 if(I2C_RequestMemoryWrite(hi2c
, DevAddress
, MemAddress
, MemAddSize
, I2C_TIMEOUT_FLAG
, tickstart
) != HAL_OK
)
2028 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
2030 /* Process Unlocked */
2036 /* Process Unlocked */
2042 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
2043 I2C_TransferConfig(hi2c
,DevAddress
, hi2c
->XferSize
, xfermode
, I2C_NO_STARTSTOP
);
2045 /* Process Unlocked */
2048 /* Note : The I2C interrupts must be enabled after unlocking current process
2049 to avoid the risk of I2C interrupt handle execution before current
2052 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
2053 /* possible to enable all of these */
2054 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
2055 I2C_Enable_IRQ(hi2c
, I2C_XFER_TX_IT
);
2066 * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
2067 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2068 * the configuration information for the specified I2C.
2069 * @param DevAddress: Target device address
2070 * @param MemAddress: Internal memory address
2071 * @param MemAddSize: Size of internal memory address
2072 * @param pData: Pointer to data buffer
2073 * @param Size: Amount of data to be sent
2074 * @retval HAL status
2076 HAL_StatusTypeDef
HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint8_t *pData
, uint16_t Size
)
2078 uint32_t tickstart
= 0;
2079 uint32_t xfermode
= 0;
2081 /* Check the parameters */
2082 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize
));
2084 if(hi2c
->State
== HAL_I2C_STATE_READY
)
2086 if((pData
== NULL
) || (Size
== 0))
2091 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_BUSY
) == SET
)
2096 /* Process Locked */
2099 /* Init tickstart for timeout management*/
2100 tickstart
= HAL_GetTick();
2102 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
2103 hi2c
->Mode
= HAL_I2C_MODE_MEM
;
2104 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
2106 /* Prepare transfer parameters */
2107 hi2c
->pBuffPtr
= pData
;
2108 hi2c
->XferCount
= Size
;
2109 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
2110 hi2c
->XferISR
= I2C_Master_ISR_IT
;
2112 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
2114 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
2115 xfermode
= I2C_RELOAD_MODE
;
2119 hi2c
->XferSize
= hi2c
->XferCount
;
2120 xfermode
= I2C_AUTOEND_MODE
;
2123 /* Send Slave Address and Memory Address */
2124 if(I2C_RequestMemoryRead(hi2c
, DevAddress
, MemAddress
, MemAddSize
, I2C_TIMEOUT_FLAG
, tickstart
) != HAL_OK
)
2126 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
2128 /* Process Unlocked */
2134 /* Process Unlocked */
2140 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
2141 I2C_TransferConfig(hi2c
,DevAddress
,hi2c
->XferSize
, xfermode
, I2C_GENERATE_START_READ
);
2143 /* Process Unlocked */
2146 /* Note : The I2C interrupts must be enabled after unlocking current process
2147 to avoid the risk of I2C interrupt handle execution before current
2150 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
2151 /* possible to enable all of these */
2152 /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
2153 I2C_Enable_IRQ(hi2c
, I2C_XFER_RX_IT
);
2163 * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
2164 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2165 * the configuration information for the specified I2C.
2166 * @param DevAddress: Target device address
2167 * @param MemAddress: Internal memory address
2168 * @param MemAddSize: Size of internal memory address
2169 * @param pData: Pointer to data buffer
2170 * @param Size: Amount of data to be sent
2171 * @retval HAL status
2173 HAL_StatusTypeDef
HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint8_t *pData
, uint16_t Size
)
2175 uint32_t tickstart
= 0;
2176 uint32_t xfermode
= 0;
2178 /* Check the parameters */
2179 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize
));
2181 if(hi2c
->State
== HAL_I2C_STATE_READY
)
2183 if((pData
== NULL
) || (Size
== 0))
2188 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_BUSY
) == SET
)
2193 /* Process Locked */
2196 /* Init tickstart for timeout management*/
2197 tickstart
= HAL_GetTick();
2199 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
2200 hi2c
->Mode
= HAL_I2C_MODE_MEM
;
2201 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
2203 /* Prepare transfer parameters */
2204 hi2c
->pBuffPtr
= pData
;
2205 hi2c
->XferCount
= Size
;
2206 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
2207 hi2c
->XferISR
= I2C_Master_ISR_DMA
;
2209 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
2211 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
2212 xfermode
= I2C_RELOAD_MODE
;
2216 hi2c
->XferSize
= hi2c
->XferCount
;
2217 xfermode
= I2C_AUTOEND_MODE
;
2220 /* Send Slave Address and Memory Address */
2221 if(I2C_RequestMemoryWrite(hi2c
, DevAddress
, MemAddress
, MemAddSize
, I2C_TIMEOUT_FLAG
, tickstart
) != HAL_OK
)
2223 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
2225 /* Process Unlocked */
2231 /* Process Unlocked */
2237 /* Set the I2C DMA transfer complete callback */
2238 hi2c
->hdmatx
->XferCpltCallback
= I2C_DMAMasterTransmitCplt
;
2240 /* Set the DMA error callback */
2241 hi2c
->hdmatx
->XferErrorCallback
= I2C_DMAError
;
2243 /* Set the unused DMA callbacks to NULL */
2244 hi2c
->hdmatx
->XferHalfCpltCallback
= NULL
;
2245 hi2c
->hdmatx
->XferAbortCallback
= NULL
;
2247 /* Enable the DMA channel */
2248 HAL_DMA_Start_IT(hi2c
->hdmatx
, (uint32_t)pData
, (uint32_t)&hi2c
->Instance
->TXDR
, hi2c
->XferSize
);
2250 /* Send Slave Address */
2251 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
2252 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, xfermode
, I2C_NO_STARTSTOP
);
2254 /* Update XferCount value */
2255 hi2c
->XferCount
-= hi2c
->XferSize
;
2257 /* Process Unlocked */
2260 /* Note : The I2C interrupts must be enabled after unlocking current process
2261 to avoid the risk of I2C interrupt handle execution before current
2263 /* Enable ERR and NACK interrupts */
2264 I2C_Enable_IRQ(hi2c
, I2C_XFER_ERROR_IT
);
2266 /* Enable DMA Request */
2267 hi2c
->Instance
->CR1
|= I2C_CR1_TXDMAEN
;
2278 * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
2279 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2280 * the configuration information for the specified I2C.
2281 * @param DevAddress: Target device address
2282 * @param MemAddress: Internal memory address
2283 * @param MemAddSize: Size of internal memory address
2284 * @param pData: Pointer to data buffer
2285 * @param Size: Amount of data to be read
2286 * @retval HAL status
2288 HAL_StatusTypeDef
HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint8_t *pData
, uint16_t Size
)
2290 uint32_t tickstart
= 0;
2291 uint32_t xfermode
= 0;
2293 /* Check the parameters */
2294 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize
));
2296 if(hi2c
->State
== HAL_I2C_STATE_READY
)
2298 if((pData
== NULL
) || (Size
== 0))
2303 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_BUSY
) == SET
)
2308 /* Process Locked */
2311 /* Init tickstart for timeout management*/
2312 tickstart
= HAL_GetTick();
2314 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
2315 hi2c
->Mode
= HAL_I2C_MODE_MEM
;
2316 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
2318 /* Prepare transfer parameters */
2319 hi2c
->pBuffPtr
= pData
;
2320 hi2c
->XferCount
= Size
;
2321 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
2322 hi2c
->XferISR
= I2C_Master_ISR_DMA
;
2324 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
2326 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
2327 xfermode
= I2C_RELOAD_MODE
;
2331 hi2c
->XferSize
= hi2c
->XferCount
;
2332 xfermode
= I2C_AUTOEND_MODE
;
2335 /* Send Slave Address and Memory Address */
2336 if(I2C_RequestMemoryRead(hi2c
, DevAddress
, MemAddress
, MemAddSize
, I2C_TIMEOUT_FLAG
, tickstart
) != HAL_OK
)
2338 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
2340 /* Process Unlocked */
2346 /* Process Unlocked */
2352 /* Set the I2C DMA transfer complete callback */
2353 hi2c
->hdmarx
->XferCpltCallback
= I2C_DMAMasterReceiveCplt
;
2355 /* Set the DMA error callback */
2356 hi2c
->hdmarx
->XferErrorCallback
= I2C_DMAError
;
2358 /* Set the unused DMA callbacks to NULL */
2359 hi2c
->hdmarx
->XferHalfCpltCallback
= NULL
;
2360 hi2c
->hdmarx
->XferAbortCallback
= NULL
;
2362 /* Enable the DMA channel */
2363 HAL_DMA_Start_IT(hi2c
->hdmarx
, (uint32_t)&hi2c
->Instance
->RXDR
, (uint32_t)pData
, hi2c
->XferSize
);
2365 /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
2366 I2C_TransferConfig(hi2c
,DevAddress
, hi2c
->XferSize
, xfermode
, I2C_GENERATE_START_READ
);
2368 /* Update XferCount value */
2369 hi2c
->XferCount
-= hi2c
->XferSize
;
2371 /* Process Unlocked */
2374 /* Enable DMA Request */
2375 hi2c
->Instance
->CR1
|= I2C_CR1_RXDMAEN
;
2377 /* Note : The I2C interrupts must be enabled after unlocking current process
2378 to avoid the risk of I2C interrupt handle execution before current
2380 /* Enable ERR and NACK interrupts */
2381 I2C_Enable_IRQ(hi2c
, I2C_XFER_ERROR_IT
);
2392 * @brief Checks if target device is ready for communication.
2393 * @note This function is used with Memory devices
2394 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2395 * the configuration information for the specified I2C.
2396 * @param DevAddress: Target device address
2397 * @param Trials: Number of trials
2398 * @param Timeout: Timeout duration
2399 * @retval HAL status
2401 HAL_StatusTypeDef
HAL_I2C_IsDeviceReady(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint32_t Trials
, uint32_t Timeout
)
2403 uint32_t tickstart
= 0;
2405 __IO
uint32_t I2C_Trials
= 0;
2407 if(hi2c
->State
== HAL_I2C_STATE_READY
)
2409 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_BUSY
) == SET
)
2414 /* Process Locked */
2417 hi2c
->State
= HAL_I2C_STATE_BUSY
;
2418 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
2422 /* Generate Start */
2423 hi2c
->Instance
->CR2
= I2C_GENERATE_START(hi2c
->Init
.AddressingMode
,DevAddress
);
2425 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
2426 /* Wait until STOPF flag is set or a NACK flag is set*/
2427 tickstart
= HAL_GetTick();
2428 while((__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_STOPF
) == RESET
) && (__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_AF
) == RESET
) && (hi2c
->State
!= HAL_I2C_STATE_TIMEOUT
))
2430 if(Timeout
!= HAL_MAX_DELAY
)
2432 if((Timeout
== 0)||((HAL_GetTick() - tickstart
) > Timeout
))
2434 /* Device is ready */
2435 hi2c
->State
= HAL_I2C_STATE_READY
;
2436 /* Process Unlocked */
2443 /* Check if the NACKF flag has not been set */
2444 if (__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_AF
) == RESET
)
2446 /* Wait until STOPF flag is reset */
2447 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_STOPF
, RESET
, Timeout
, tickstart
) != HAL_OK
)
2452 /* Clear STOP Flag */
2453 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
2455 /* Device is ready */
2456 hi2c
->State
= HAL_I2C_STATE_READY
;
2458 /* Process Unlocked */
2465 /* Wait until STOPF flag is reset */
2466 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_STOPF
, RESET
, Timeout
, tickstart
) != HAL_OK
)
2471 /* Clear NACK Flag */
2472 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
2474 /* Clear STOP Flag, auto generated with autoend*/
2475 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
2478 /* Check if the maximum allowed number of trials has been reached */
2479 if (I2C_Trials
++ == Trials
)
2482 hi2c
->Instance
->CR2
|= I2C_CR2_STOP
;
2484 /* Wait until STOPF flag is reset */
2485 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_STOPF
, RESET
, Timeout
, tickstart
) != HAL_OK
)
2490 /* Clear STOP Flag */
2491 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
2493 }while(I2C_Trials
< Trials
);
2495 hi2c
->State
= HAL_I2C_STATE_READY
;
2497 /* Process Unlocked */
2509 * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.
2510 * @note This interface allow to manage repeated start condition when a direction change during transfer
2511 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2512 * the configuration information for the specified I2C.
2513 * @param DevAddress: Target device address
2514 * @param pData: Pointer to data buffer
2515 * @param Size: Amount of data to be sent
2516 * @param XferOptions: Options of Transfer, value of @ref I2C_XFEROPTIONS
2517 * @retval HAL status
2519 HAL_StatusTypeDef
HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t *pData
, uint16_t Size
, uint32_t XferOptions
)
2521 uint32_t xfermode
= 0;
2522 uint32_t xferrequest
= I2C_GENERATE_START_WRITE
;
2524 /* Check the parameters */
2525 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions
));
2527 if(hi2c
->State
== HAL_I2C_STATE_READY
)
2529 /* Process Locked */
2532 hi2c
->State
= HAL_I2C_STATE_BUSY_TX
;
2533 hi2c
->Mode
= HAL_I2C_MODE_MASTER
;
2534 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
2536 /* Prepare transfer parameters */
2537 hi2c
->pBuffPtr
= pData
;
2538 hi2c
->XferCount
= Size
;
2539 hi2c
->XferOptions
= XferOptions
;
2540 hi2c
->XferISR
= I2C_Master_ISR_IT
;
2542 /* If size > MAX_NBYTE_SIZE, use reload mode */
2543 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
2545 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
2546 xfermode
= I2C_RELOAD_MODE
;
2550 hi2c
->XferSize
= hi2c
->XferCount
;
2551 xfermode
= hi2c
->XferOptions
;
2553 /* If transfer direction not change, do not generate Restart Condition */
2554 /* Mean Previous state is same as current state */
2555 if(hi2c
->PreviousState
== I2C_STATE_SLAVE_BUSY_TX
)
2557 xferrequest
= I2C_NO_STARTSTOP
;
2561 /* Send Slave Address and set NBYTES to write */
2562 I2C_TransferConfig(hi2c
, DevAddress
, hi2c
->XferSize
, xfermode
, xferrequest
);
2564 /* Process Unlocked */
2567 /* Note : The I2C interrupts must be enabled after unlocking current process
2568 to avoid the risk of I2C interrupt handle execution before current
2570 I2C_Enable_IRQ(hi2c
, I2C_XFER_TX_IT
);
2581 * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt
2582 * @note This interface allow to manage repeated start condition when a direction change during transfer
2583 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2584 * the configuration information for the specified I2C.
2585 * @param DevAddress: Target device address
2586 * @param pData: Pointer to data buffer
2587 * @param Size: Amount of data to be sent
2588 * @param XferOptions: Options of Transfer, value of @ref I2C_XFEROPTIONS
2589 * @retval HAL status
2591 HAL_StatusTypeDef
HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t *pData
, uint16_t Size
, uint32_t XferOptions
)
2593 uint32_t xfermode
= 0;
2594 uint32_t xferrequest
= I2C_GENERATE_START_READ
;
2596 /* Check the parameters */
2597 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions
));
2599 if(hi2c
->State
== HAL_I2C_STATE_READY
)
2601 /* Process Locked */
2604 hi2c
->State
= HAL_I2C_STATE_BUSY_RX
;
2605 hi2c
->Mode
= HAL_I2C_MODE_MASTER
;
2606 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
2608 /* Prepare transfer parameters */
2609 hi2c
->pBuffPtr
= pData
;
2610 hi2c
->XferCount
= Size
;
2611 hi2c
->XferOptions
= XferOptions
;
2612 hi2c
->XferISR
= I2C_Master_ISR_IT
;
2614 /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */
2615 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
2617 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
2618 xfermode
= I2C_RELOAD_MODE
;
2622 hi2c
->XferSize
= hi2c
->XferCount
;
2623 xfermode
= hi2c
->XferOptions
;
2625 /* If transfer direction not change, do not generate Restart Condition */
2626 /* Mean Previous state is same as current state */
2627 if(hi2c
->PreviousState
== I2C_STATE_MASTER_BUSY_RX
)
2629 xferrequest
= I2C_NO_STARTSTOP
;
2633 /* Send Slave Address and set NBYTES to read */
2634 I2C_TransferConfig(hi2c
,DevAddress
, hi2c
->XferSize
, xfermode
, xferrequest
);
2636 /* Process Unlocked */
2639 /* Note : The I2C interrupts must be enabled after unlocking current process
2640 to avoid the risk of I2C interrupt handle execution before current
2642 I2C_Enable_IRQ(hi2c
, I2C_XFER_RX_IT
);
2653 * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with Interrupt
2654 * @note This interface allow to manage repeated start condition when a direction change during transfer
2655 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2656 * the configuration information for the specified I2C.
2657 * @param pData: Pointer to data buffer
2658 * @param Size: Amount of data to be sent
2659 * @param XferOptions: Options of Transfer, value of @ref I2C_XFEROPTIONS
2660 * @retval HAL status
2662 HAL_StatusTypeDef
HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef
*hi2c
, uint8_t *pData
, uint16_t Size
, uint32_t XferOptions
)
2664 /* Check the parameters */
2665 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions
));
2667 if(hi2c
->State
== HAL_I2C_STATE_LISTEN
)
2669 if((pData
== NULL
) || (Size
== 0))
2674 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
2675 I2C_Disable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
| I2C_XFER_TX_IT
);
2677 /* Process Locked */
2680 hi2c
->State
= HAL_I2C_STATE_BUSY_TX_LISTEN
;
2681 hi2c
->Mode
= HAL_I2C_MODE_SLAVE
;
2682 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
2684 /* Enable Address Acknowledge */
2685 hi2c
->Instance
->CR2
&= ~I2C_CR2_NACK
;
2687 /* Prepare transfer parameters */
2688 hi2c
->pBuffPtr
= pData
;
2689 hi2c
->XferCount
= Size
;
2690 hi2c
->XferSize
= hi2c
->XferCount
;
2691 hi2c
->XferOptions
= XferOptions
;
2692 hi2c
->XferISR
= I2C_Slave_ISR_IT
;
2694 if(I2C_GET_DIR(hi2c
) == I2C_DIRECTION_RECEIVE
)
2696 /* Clear ADDR flag after prepare the transfer parameters */
2697 /* This action will generate an acknowledge to the Master */
2698 __HAL_I2C_CLEAR_FLAG(hi2c
,I2C_FLAG_ADDR
);
2701 /* Process Unlocked */
2704 /* Note : The I2C interrupts must be enabled after unlocking current process
2705 to avoid the risk of I2C interrupt handle execution before current
2707 /* REnable ADDR interrupt */
2708 I2C_Enable_IRQ(hi2c
, I2C_XFER_TX_IT
| I2C_XFER_LISTEN_IT
);
2719 * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with Interrupt
2720 * @note This interface allow to manage repeated start condition when a direction change during transfer
2721 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2722 * the configuration information for the specified I2C.
2723 * @param pData: Pointer to data buffer
2724 * @param Size: Amount of data to be sent
2725 * @param XferOptions: Options of Transfer, value of @ref I2C_XFEROPTIONS
2726 * @retval HAL status
2728 HAL_StatusTypeDef
HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef
*hi2c
, uint8_t *pData
, uint16_t Size
, uint32_t XferOptions
)
2730 /* Check the parameters */
2731 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions
));
2733 if(hi2c
->State
== HAL_I2C_STATE_LISTEN
)
2735 if((pData
== NULL
) || (Size
== 0))
2740 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
2741 I2C_Disable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
| I2C_XFER_RX_IT
);
2743 /* Process Locked */
2746 hi2c
->State
= HAL_I2C_STATE_BUSY_RX_LISTEN
;
2747 hi2c
->Mode
= HAL_I2C_MODE_SLAVE
;
2748 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
2750 /* Enable Address Acknowledge */
2751 hi2c
->Instance
->CR2
&= ~I2C_CR2_NACK
;
2753 /* Prepare transfer parameters */
2754 hi2c
->pBuffPtr
= pData
;
2755 hi2c
->XferCount
= Size
;
2756 hi2c
->XferSize
= hi2c
->XferCount
;
2757 hi2c
->XferOptions
= XferOptions
;
2758 hi2c
->XferISR
= I2C_Slave_ISR_IT
;
2760 if(I2C_GET_DIR(hi2c
) == I2C_DIRECTION_TRANSMIT
)
2762 /* Clear ADDR flag after prepare the transfer parameters */
2763 /* This action will generate an acknowledge to the Master */
2764 __HAL_I2C_CLEAR_FLAG(hi2c
,I2C_FLAG_ADDR
);
2767 /* Process Unlocked */
2770 /* Note : The I2C interrupts must be enabled after unlocking current process
2771 to avoid the risk of I2C interrupt handle execution before current
2773 /* REnable ADDR interrupt */
2774 I2C_Enable_IRQ(hi2c
, I2C_XFER_RX_IT
| I2C_XFER_LISTEN_IT
);
2785 * @brief Enable the Address listen mode with Interrupt.
2786 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2787 * the configuration information for the specified I2C.
2788 * @retval HAL status
2790 HAL_StatusTypeDef
HAL_I2C_EnableListen_IT(I2C_HandleTypeDef
*hi2c
)
2792 if(hi2c
->State
== HAL_I2C_STATE_READY
)
2794 hi2c
->State
= HAL_I2C_STATE_LISTEN
;
2795 hi2c
->XferISR
= I2C_Slave_ISR_IT
;
2797 /* Enable the Address Match interrupt */
2798 I2C_Enable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
);
2809 * @brief Disable the Address listen mode with Interrupt.
2810 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2811 * the configuration information for the specified I2C
2812 * @retval HAL status
2814 HAL_StatusTypeDef
HAL_I2C_DisableListen_IT(I2C_HandleTypeDef
*hi2c
)
2816 /* Declaration of tmp to prevent undefined behavior of volatile usage */
2819 /* Disable Address listen mode only if a transfer is not ongoing */
2820 if(hi2c
->State
== HAL_I2C_STATE_LISTEN
)
2822 tmp
= (uint32_t)(hi2c
->State
) & I2C_STATE_MSK
;
2823 hi2c
->PreviousState
= tmp
| (uint32_t)(hi2c
->Mode
);
2824 hi2c
->State
= HAL_I2C_STATE_READY
;
2825 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
2826 hi2c
->XferISR
= NULL
;
2828 /* Disable the Address Match interrupt */
2829 I2C_Disable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
);
2840 * @brief Abort a master I2C IT or DMA process communication with Interrupt.
2841 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2842 * the configuration information for the specified I2C.
2843 * @param DevAddress: Target device address
2844 * @retval HAL status
2846 HAL_StatusTypeDef
HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
)
2848 if(hi2c
->Mode
== HAL_I2C_MODE_MASTER
)
2850 /* Process Locked */
2853 /* Disable Interrupts */
2854 I2C_Disable_IRQ(hi2c
, I2C_XFER_RX_IT
);
2855 I2C_Disable_IRQ(hi2c
, I2C_XFER_TX_IT
);
2857 /* Set State at HAL_I2C_STATE_ABORT */
2858 hi2c
->State
= HAL_I2C_STATE_ABORT
;
2860 /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */
2861 /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
2862 I2C_TransferConfig(hi2c
, 0, 1, I2C_AUTOEND_MODE
, I2C_GENERATE_STOP
);
2864 /* Process Unlocked */
2867 /* Note : The I2C interrupts must be enabled after unlocking current process
2868 to avoid the risk of I2C interrupt handle execution before current
2870 I2C_Enable_IRQ(hi2c
, I2C_XFER_CPLT_IT
);
2876 /* Wrong usage of abort function */
2877 /* This function should be used only in case of abort monitored by master device */
2886 /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
2891 * @brief This function handles I2C event interrupt request.
2892 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2893 * the configuration information for the specified I2C.
2896 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef
*hi2c
)
2898 /* Get current IT Flags and IT sources value */
2899 uint32_t itflags
= READ_REG(hi2c
->Instance
->ISR
);
2900 uint32_t itsources
= READ_REG(hi2c
->Instance
->CR1
);
2902 /* I2C events treatment -------------------------------------*/
2903 if(hi2c
->XferISR
!= NULL
)
2905 hi2c
->XferISR(hi2c
, itflags
, itsources
);
2910 * @brief This function handles I2C error interrupt request.
2911 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2912 * the configuration information for the specified I2C.
2915 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef
*hi2c
)
2917 uint32_t itflags
= READ_REG(hi2c
->Instance
->ISR
);
2918 uint32_t itsources
= READ_REG(hi2c
->Instance
->CR1
);
2920 /* I2C Bus error interrupt occurred ------------------------------------*/
2921 if(((itflags
& I2C_FLAG_BERR
) != RESET
) && ((itsources
& I2C_IT_ERRI
) != RESET
))
2923 hi2c
->ErrorCode
|= HAL_I2C_ERROR_BERR
;
2925 /* Clear BERR flag */
2926 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_BERR
);
2929 /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
2930 if(((itflags
& I2C_FLAG_OVR
) != RESET
) && ((itsources
& I2C_IT_ERRI
) != RESET
))
2932 hi2c
->ErrorCode
|= HAL_I2C_ERROR_OVR
;
2934 /* Clear OVR flag */
2935 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_OVR
);
2938 /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
2939 if(((itflags
& I2C_FLAG_ARLO
) != RESET
) && ((itsources
& I2C_IT_ERRI
) != RESET
))
2941 hi2c
->ErrorCode
|= HAL_I2C_ERROR_ARLO
;
2943 /* Clear ARLO flag */
2944 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_ARLO
);
2947 /* Call the Error Callback in case of Error detected */
2948 if((hi2c
->ErrorCode
& (HAL_I2C_ERROR_BERR
| HAL_I2C_ERROR_OVR
| HAL_I2C_ERROR_ARLO
)) != HAL_I2C_ERROR_NONE
)
2950 I2C_ITError(hi2c
, hi2c
->ErrorCode
);
2955 * @brief Master Tx Transfer completed callback.
2956 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2957 * the configuration information for the specified I2C.
2960 __weak
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef
*hi2c
)
2962 /* Prevent unused argument(s) compilation warning */
2965 /* NOTE : This function should not be modified, when the callback is needed,
2966 the HAL_I2C_MasterTxCpltCallback could be implemented in the user file
2971 * @brief Master Rx Transfer completed callback.
2972 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2973 * the configuration information for the specified I2C.
2976 __weak
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef
*hi2c
)
2978 /* Prevent unused argument(s) compilation warning */
2981 /* NOTE : This function should not be modified, when the callback is needed,
2982 the HAL_I2C_MasterRxCpltCallback could be implemented in the user file
2986 /** @brief Slave Tx Transfer completed callback.
2987 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
2988 * the configuration information for the specified I2C.
2991 __weak
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef
*hi2c
)
2993 /* Prevent unused argument(s) compilation warning */
2996 /* NOTE : This function should not be modified, when the callback is needed,
2997 the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file
3002 * @brief Slave Rx Transfer completed callback.
3003 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3004 * the configuration information for the specified I2C.
3007 __weak
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef
*hi2c
)
3009 /* Prevent unused argument(s) compilation warning */
3012 /* NOTE : This function should not be modified, when the callback is needed,
3013 the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file
3018 * @brief Slave Address Match callback.
3019 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3020 * the configuration information for the specified I2C.
3021 * @param TransferDirection: Master request Transfer Direction (Write/Read), value of @ref I2C_XFEROPTIONS
3022 * @param AddrMatchCode: Address Match Code
3025 __weak
void HAL_I2C_AddrCallback(I2C_HandleTypeDef
*hi2c
, uint8_t TransferDirection
, uint16_t AddrMatchCode
)
3027 /* Prevent unused argument(s) compilation warning */
3029 UNUSED(TransferDirection
);
3030 UNUSED(AddrMatchCode
);
3032 /* NOTE : This function should not be modified, when the callback is needed,
3033 the HAL_I2C_AddrCallback() could be implemented in the user file
3038 * @brief Listen Complete callback.
3039 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3040 * the configuration information for the specified I2C.
3043 __weak
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef
*hi2c
)
3045 /* Prevent unused argument(s) compilation warning */
3048 /* NOTE : This function should not be modified, when the callback is needed,
3049 the HAL_I2C_ListenCpltCallback() could be implemented in the user file
3054 * @brief Memory Tx Transfer completed callback.
3055 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3056 * the configuration information for the specified I2C.
3059 __weak
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef
*hi2c
)
3061 /* Prevent unused argument(s) compilation warning */
3064 /* NOTE : This function should not be modified, when the callback is needed,
3065 the HAL_I2C_MemTxCpltCallback could be implemented in the user file
3070 * @brief Memory Rx Transfer completed callback.
3071 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3072 * the configuration information for the specified I2C.
3075 __weak
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef
*hi2c
)
3077 /* Prevent unused argument(s) compilation warning */
3080 /* NOTE : This function should not be modified, when the callback is needed,
3081 the HAL_I2C_MemRxCpltCallback could be implemented in the user file
3086 * @brief I2C error callback.
3087 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3088 * the configuration information for the specified I2C.
3091 __weak
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef
*hi2c
)
3093 /* Prevent unused argument(s) compilation warning */
3096 /* NOTE : This function should not be modified, when the callback is needed,
3097 the HAL_I2C_ErrorCallback could be implemented in the user file
3102 * @brief I2C abort callback.
3103 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3104 * the configuration information for the specified I2C.
3107 __weak
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef
*hi2c
)
3109 /* Prevent unused argument(s) compilation warning */
3112 /* NOTE : This function should not be modified, when the callback is needed,
3113 the HAL_I2C_AbortCpltCallback could be implemented in the user file
3121 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
3122 * @brief Peripheral State, Mode and Error functions
3125 ===============================================================================
3126 ##### Peripheral State, Mode and Error functions #####
3127 ===============================================================================
3129 This subsection permit to get in run-time the status of the peripheral
3137 * @brief Return the I2C handle state.
3138 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3139 * the configuration information for the specified I2C.
3142 HAL_I2C_StateTypeDef
HAL_I2C_GetState(I2C_HandleTypeDef
*hi2c
)
3144 /* Return I2C handle state */
3149 * @brief Returns the I2C Master, Slave, Memory or no mode.
3150 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3151 * the configuration information for I2C module
3154 HAL_I2C_ModeTypeDef
HAL_I2C_GetMode(I2C_HandleTypeDef
*hi2c
)
3160 * @brief Return the I2C error code.
3161 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3162 * the configuration information for the specified I2C.
3163 * @retval I2C Error Code
3165 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef
*hi2c
)
3167 return hi2c
->ErrorCode
;
3178 /** @addtogroup I2C_Private_Functions
3183 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt.
3184 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3185 * the configuration information for the specified I2C.
3186 * @param ITFlags: Interrupt flags to handle.
3187 * @param ITSources: Interrupt sources enabled.
3188 * @retval HAL status
3190 static HAL_StatusTypeDef
I2C_Master_ISR_IT(struct __I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
, uint32_t ITSources
)
3192 uint16_t devaddress
= 0;
3194 /* Process Locked */
3197 if(((ITFlags
& I2C_FLAG_AF
) != RESET
) && ((ITSources
& I2C_IT_NACKI
) != RESET
))
3199 /* Clear NACK Flag */
3200 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
3202 /* Set corresponding Error Code */
3203 /* No need to generate STOP, it is automatically done */
3204 /* Error callback will be send during stop flag treatment */
3205 hi2c
->ErrorCode
|= HAL_I2C_ERROR_AF
;
3207 /* Flush TX register */
3208 I2C_Flush_TXDR(hi2c
);
3210 else if(((ITFlags
& I2C_FLAG_RXNE
) != RESET
) && ((ITSources
& I2C_IT_RXI
) != RESET
))
3212 /* Read data from RXDR */
3213 (*hi2c
->pBuffPtr
++) = hi2c
->Instance
->RXDR
;
3217 else if(((ITFlags
& I2C_FLAG_TXIS
) != RESET
) && ((ITSources
& I2C_IT_TXI
) != RESET
))
3219 /* Write data to TXDR */
3220 hi2c
->Instance
->TXDR
= (*hi2c
->pBuffPtr
++);
3224 else if(((ITFlags
& I2C_FLAG_TCR
) != RESET
) && ((ITSources
& I2C_IT_TCI
) != RESET
))
3226 if((hi2c
->XferSize
== 0) && (hi2c
->XferCount
!= 0))
3228 devaddress
= (hi2c
->Instance
->CR2
& I2C_CR2_SADD
);
3230 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
3232 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
3233 I2C_TransferConfig(hi2c
, devaddress
, hi2c
->XferSize
, I2C_RELOAD_MODE
, I2C_NO_STARTSTOP
);
3237 hi2c
->XferSize
= hi2c
->XferCount
;
3238 if(hi2c
->XferOptions
!= I2C_NO_OPTION_FRAME
)
3240 I2C_TransferConfig(hi2c
, devaddress
, hi2c
->XferSize
, hi2c
->XferOptions
, I2C_NO_STARTSTOP
);
3244 I2C_TransferConfig(hi2c
, devaddress
, hi2c
->XferSize
, I2C_AUTOEND_MODE
, I2C_NO_STARTSTOP
);
3250 /* Call TxCpltCallback() if no stop mode is set */
3251 if((I2C_GET_STOP_MODE(hi2c
) != I2C_AUTOEND_MODE
)&&(hi2c
->Mode
== HAL_I2C_MODE_MASTER
))
3253 /* Call I2C Master Sequential complete process */
3254 I2C_ITMasterSequentialCplt(hi2c
);
3258 /* Wrong size Status regarding TCR flag event */
3259 /* Call the corresponding callback to inform upper layer of End of Transfer */
3260 I2C_ITError(hi2c
, HAL_I2C_ERROR_SIZE
);
3264 else if(((ITFlags
& I2C_FLAG_TC
) != RESET
) && ((ITSources
& I2C_IT_TCI
) != RESET
))
3266 if(hi2c
->XferCount
== 0)
3268 if((I2C_GET_STOP_MODE(hi2c
) != I2C_AUTOEND_MODE
)&&(hi2c
->Mode
== HAL_I2C_MODE_MASTER
))
3270 /* Call I2C Master Sequential complete process */
3271 I2C_ITMasterSequentialCplt(hi2c
);
3276 /* Wrong size Status regarding TC flag event */
3277 /* Call the corresponding callback to inform upper layer of End of Transfer */
3278 I2C_ITError(hi2c
, HAL_I2C_ERROR_SIZE
);
3282 if(((ITFlags
& I2C_FLAG_STOPF
) != RESET
) && ((ITSources
& I2C_IT_STOPI
) != RESET
))
3284 /* Call I2C Master complete process */
3285 I2C_ITMasterCplt(hi2c
, ITFlags
);
3288 /* Process Unlocked */
3295 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt.
3296 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3297 * the configuration information for the specified I2C.
3298 * @param ITFlags: Interrupt flags to handle.
3299 * @param ITSources: Interrupt sources enabled.
3300 * @retval HAL status
3302 static HAL_StatusTypeDef
I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
, uint32_t ITSources
)
3304 /* Process locked */
3307 if(((ITFlags
& I2C_FLAG_AF
) != RESET
) && ((ITSources
& I2C_IT_NACKI
) != RESET
))
3309 /* Check that I2C transfer finished */
3310 /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
3311 /* Mean XferCount == 0*/
3312 /* So clear Flag NACKF only */
3313 if(hi2c
->XferCount
== 0)
3315 if(((hi2c
->XferOptions
== I2C_FIRST_AND_LAST_FRAME
) || (hi2c
->XferOptions
== I2C_LAST_FRAME
)) && \
3316 (hi2c
->State
== HAL_I2C_STATE_LISTEN
))
3318 /* Call I2C Listen complete process */
3319 I2C_ITListenCplt(hi2c
, ITFlags
);
3321 else if((hi2c
->XferOptions
!= I2C_NO_OPTION_FRAME
) && (hi2c
->State
== HAL_I2C_STATE_BUSY_TX_LISTEN
))
3323 /* Clear NACK Flag */
3324 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
3326 /* Flush TX register */
3327 I2C_Flush_TXDR(hi2c
);
3329 /* Last Byte is Transmitted */
3330 /* Call I2C Slave Sequential complete process */
3331 I2C_ITSlaveSequentialCplt(hi2c
);
3335 /* Clear NACK Flag */
3336 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
3341 /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
3342 /* Clear NACK Flag */
3343 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
3345 /* Set ErrorCode corresponding to a Non-Acknowledge */
3346 hi2c
->ErrorCode
|= HAL_I2C_ERROR_AF
;
3349 else if(((ITFlags
& I2C_FLAG_RXNE
) != RESET
) && ((ITSources
& I2C_IT_RXI
) != RESET
))
3351 if(hi2c
->XferCount
> 0)
3353 /* Read data from RXDR */
3354 (*hi2c
->pBuffPtr
++) = hi2c
->Instance
->RXDR
;
3359 if((hi2c
->XferCount
== 0) && \
3360 (hi2c
->XferOptions
!= I2C_NO_OPTION_FRAME
))
3362 /* Call I2C Slave Sequential complete process */
3363 I2C_ITSlaveSequentialCplt(hi2c
);
3366 else if(((ITFlags
& I2C_FLAG_ADDR
) != RESET
) && ((ITSources
& I2C_IT_ADDRI
) != RESET
))
3368 I2C_ITAddrCplt(hi2c
, ITFlags
);
3370 else if(((ITFlags
& I2C_FLAG_TXIS
) != RESET
) && ((ITSources
& I2C_IT_TXI
) != RESET
))
3372 /* Write data to TXDR only if XferCount not reach "0" */
3373 /* A TXIS flag can be set, during STOP treatment */
3374 /* Check if all Datas have already been sent */
3375 /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
3376 if(hi2c
->XferCount
> 0)
3378 /* Write data to TXDR */
3379 hi2c
->Instance
->TXDR
= (*hi2c
->pBuffPtr
++);
3385 if((hi2c
->XferOptions
== I2C_NEXT_FRAME
) || (hi2c
->XferOptions
== I2C_FIRST_FRAME
))
3387 /* Last Byte is Transmitted */
3388 /* Call I2C Slave Sequential complete process */
3389 I2C_ITSlaveSequentialCplt(hi2c
);
3394 /* Check if STOPF is set */
3395 if(((ITFlags
& I2C_FLAG_STOPF
) != RESET
) && ((ITSources
& I2C_IT_STOPI
) != RESET
))
3397 /* Call I2C Slave complete process */
3398 I2C_ITSlaveCplt(hi2c
, ITFlags
);
3401 /* Process Unlocked */
3408 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA.
3409 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3410 * the configuration information for the specified I2C.
3411 * @param ITFlags: Interrupt flags to handle.
3412 * @param ITSources: Interrupt sources enabled.
3413 * @retval HAL status
3415 static HAL_StatusTypeDef
I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
, uint32_t ITSources
)
3417 uint16_t devaddress
= 0;
3418 uint32_t xfermode
= 0;
3420 /* Process Locked */
3423 if(((ITFlags
& I2C_FLAG_AF
) != RESET
) && ((ITSources
& I2C_IT_NACKI
) != RESET
))
3425 /* Clear NACK Flag */
3426 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
3428 /* Set corresponding Error Code */
3429 hi2c
->ErrorCode
|= HAL_I2C_ERROR_AF
;
3431 /* No need to generate STOP, it is automatically done */
3432 /* But enable STOP interrupt, to treat it */
3433 /* Error callback will be send during stop flag treatment */
3434 I2C_Enable_IRQ(hi2c
, I2C_XFER_CPLT_IT
);
3436 /* Flush TX register */
3437 I2C_Flush_TXDR(hi2c
);
3439 else if(((ITFlags
& I2C_FLAG_TCR
) != RESET
) && ((ITSources
& I2C_IT_TCI
) != RESET
))
3441 /* Disable TC interrupt */
3442 __HAL_I2C_DISABLE_IT(hi2c
, I2C_IT_TCI
);
3444 if(hi2c
->XferCount
!= 0)
3446 /* Recover Slave address */
3447 devaddress
= (hi2c
->Instance
->CR2
& I2C_CR2_SADD
);
3449 /* Prepare the new XferSize to transfer */
3450 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
3452 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
3453 xfermode
= I2C_RELOAD_MODE
;
3457 hi2c
->XferSize
= hi2c
->XferCount
;
3458 xfermode
= I2C_AUTOEND_MODE
;
3461 /* Set the new XferSize in Nbytes register */
3462 I2C_TransferConfig(hi2c
, devaddress
, hi2c
->XferSize
, xfermode
, I2C_NO_STARTSTOP
);
3464 /* Update XferCount value */
3465 hi2c
->XferCount
-= hi2c
->XferSize
;
3467 /* Enable DMA Request */
3468 if(hi2c
->State
== HAL_I2C_STATE_BUSY_RX
)
3470 hi2c
->Instance
->CR1
|= I2C_CR1_RXDMAEN
;
3474 hi2c
->Instance
->CR1
|= I2C_CR1_TXDMAEN
;
3479 /* Wrong size Status regarding TCR flag event */
3480 /* Call the corresponding callback to inform upper layer of End of Transfer */
3481 I2C_ITError(hi2c
, HAL_I2C_ERROR_SIZE
);
3484 else if(((ITFlags
& I2C_FLAG_STOPF
) != RESET
) && ((ITSources
& I2C_IT_STOPI
) != RESET
))
3486 /* Call I2C Master complete process */
3487 I2C_ITMasterCplt(hi2c
, ITFlags
);
3490 /* Process Unlocked */
3497 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA.
3498 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3499 * the configuration information for the specified I2C.
3500 * @param ITFlags: Interrupt flags to handle.
3501 * @param ITSources: Interrupt sources enabled.
3502 * @retval HAL status
3504 static HAL_StatusTypeDef
I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
, uint32_t ITSources
)
3506 /* Process locked */
3509 if(((ITFlags
& I2C_FLAG_AF
) != RESET
) && ((ITSources
& I2C_IT_NACKI
) != RESET
))
3511 /* Check that I2C transfer finished */
3512 /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
3513 /* Mean XferCount == 0 */
3514 /* So clear Flag NACKF only */
3515 if(I2C_GET_DMA_REMAIN_DATA(hi2c
) == 0)
3517 /* Clear NACK Flag */
3518 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
3522 /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
3523 /* Clear NACK Flag */
3524 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
3526 /* Set ErrorCode corresponding to a Non-Acknowledge */
3527 hi2c
->ErrorCode
|= HAL_I2C_ERROR_AF
;
3530 else if(((ITFlags
& I2C_FLAG_ADDR
) != RESET
) && ((ITSources
& I2C_IT_ADDRI
) != RESET
))
3532 /* Clear ADDR flag */
3533 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_ADDR
);
3535 else if(((ITFlags
& I2C_FLAG_STOPF
) != RESET
) && ((ITSources
& I2C_IT_STOPI
) != RESET
))
3537 /* Call I2C Slave complete process */
3538 I2C_ITSlaveCplt(hi2c
, ITFlags
);
3541 /* Process Unlocked */
3548 * @brief Master sends target device address followed by internal memory address for write request.
3549 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3550 * the configuration information for the specified I2C.
3551 * @param DevAddress: Target device address
3552 * @param MemAddress: Internal memory address
3553 * @param MemAddSize: Size of internal memory address
3554 * @param Timeout: Timeout duration
3555 * @param Tickstart Tick start value
3556 * @retval HAL status
3558 static HAL_StatusTypeDef
I2C_RequestMemoryWrite(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint32_t Timeout
, uint32_t Tickstart
)
3560 I2C_TransferConfig(hi2c
,DevAddress
,MemAddSize
, I2C_RELOAD_MODE
, I2C_GENERATE_START_WRITE
);
3562 /* Wait until TXIS flag is set */
3563 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c
, Timeout
, Tickstart
) != HAL_OK
)
3565 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
3575 /* If Memory address size is 8Bit */
3576 if(MemAddSize
== I2C_MEMADD_SIZE_8BIT
)
3578 /* Send Memory Address */
3579 hi2c
->Instance
->TXDR
= I2C_MEM_ADD_LSB(MemAddress
);
3581 /* If Memory address size is 16Bit */
3584 /* Send MSB of Memory Address */
3585 hi2c
->Instance
->TXDR
= I2C_MEM_ADD_MSB(MemAddress
);
3587 /* Wait until TXIS flag is set */
3588 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c
, Timeout
, Tickstart
) != HAL_OK
)
3590 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
3600 /* Send LSB of Memory Address */
3601 hi2c
->Instance
->TXDR
= I2C_MEM_ADD_LSB(MemAddress
);
3604 /* Wait until TCR flag is set */
3605 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_TCR
, RESET
, Timeout
, Tickstart
) != HAL_OK
)
3614 * @brief Master sends target device address followed by internal memory address for read request.
3615 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
3616 * the configuration information for the specified I2C.
3617 * @param DevAddress: Target device address
3618 * @param MemAddress: Internal memory address
3619 * @param MemAddSize: Size of internal memory address
3620 * @param Timeout: Timeout duration
3621 * @param Tickstart Tick start value
3622 * @retval HAL status
3624 static HAL_StatusTypeDef
I2C_RequestMemoryRead(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint16_t MemAddress
, uint16_t MemAddSize
, uint32_t Timeout
, uint32_t Tickstart
)
3626 I2C_TransferConfig(hi2c
,DevAddress
,MemAddSize
, I2C_SOFTEND_MODE
, I2C_GENERATE_START_WRITE
);
3628 /* Wait until TXIS flag is set */
3629 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c
, Timeout
, Tickstart
) != HAL_OK
)
3631 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
3641 /* If Memory address size is 8Bit */
3642 if(MemAddSize
== I2C_MEMADD_SIZE_8BIT
)
3644 /* Send Memory Address */
3645 hi2c
->Instance
->TXDR
= I2C_MEM_ADD_LSB(MemAddress
);
3647 /* If Memory address size is 16Bit */
3650 /* Send MSB of Memory Address */
3651 hi2c
->Instance
->TXDR
= I2C_MEM_ADD_MSB(MemAddress
);
3653 /* Wait until TXIS flag is set */
3654 if(I2C_WaitOnTXISFlagUntilTimeout(hi2c
, Timeout
, Tickstart
) != HAL_OK
)
3656 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_AF
)
3666 /* Send LSB of Memory Address */
3667 hi2c
->Instance
->TXDR
= I2C_MEM_ADD_LSB(MemAddress
);
3670 /* Wait until TC flag is set */
3671 if(I2C_WaitOnFlagUntilTimeout(hi2c
, I2C_FLAG_TC
, RESET
, Timeout
, Tickstart
) != HAL_OK
)
3680 * @brief I2C Address complete process callback.
3681 * @param hi2c: I2C handle.
3682 * @param ITFlags: Interrupt flags to handle.
3685 static void I2C_ITAddrCplt(I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
)
3687 uint8_t transferdirection
= 0;
3688 uint16_t slaveaddrcode
= 0;
3689 uint16_t ownadd1code
= 0;
3690 uint16_t ownadd2code
= 0;
3692 /* In case of Listen state, need to inform upper layer of address match code event */
3693 if((hi2c
->State
& HAL_I2C_STATE_LISTEN
) == HAL_I2C_STATE_LISTEN
)
3695 transferdirection
= I2C_GET_DIR(hi2c
);
3696 slaveaddrcode
= I2C_GET_ADDR_MATCH(hi2c
);
3697 ownadd1code
= I2C_GET_OWN_ADDRESS1(hi2c
);
3698 ownadd2code
= I2C_GET_OWN_ADDRESS2(hi2c
);
3700 /* If 10bits addressing mode is selected */
3701 if(hi2c
->Init
.AddressingMode
== I2C_ADDRESSINGMODE_10BIT
)
3703 if((slaveaddrcode
& SlaveAddr_MSK
) == ((ownadd1code
>> SlaveAddr_SHIFT
) & SlaveAddr_MSK
))
3705 slaveaddrcode
= ownadd1code
;
3706 hi2c
->AddrEventCount
++;
3707 if(hi2c
->AddrEventCount
== 2)
3709 /* Reset Address Event counter */
3710 hi2c
->AddrEventCount
= 0;
3712 /* Clear ADDR flag */
3713 __HAL_I2C_CLEAR_FLAG(hi2c
,I2C_FLAG_ADDR
);
3715 /* Process Unlocked */
3718 /* Call Slave Addr callback */
3719 HAL_I2C_AddrCallback(hi2c
, transferdirection
, slaveaddrcode
);
3724 slaveaddrcode
= ownadd2code
;
3726 /* Disable ADDR Interrupts */
3727 I2C_Disable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
);
3729 /* Process Unlocked */
3732 /* Call Slave Addr callback */
3733 HAL_I2C_AddrCallback(hi2c
, transferdirection
, slaveaddrcode
);
3736 /* else 7 bits addressing mode is selected */
3739 /* Disable ADDR Interrupts */
3740 I2C_Disable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
);
3742 /* Process Unlocked */
3745 /* Call Slave Addr callback */
3746 HAL_I2C_AddrCallback(hi2c
, transferdirection
, slaveaddrcode
);
3749 /* Else clear address flag only */
3752 /* Clear ADDR flag */
3753 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_ADDR
);
3755 /* Process Unlocked */
3761 * @brief I2C Master sequential complete process.
3762 * @param hi2c: I2C handle.
3765 static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef
*hi2c
)
3767 /* Reset I2C handle mode */
3768 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
3770 /* No Generate Stop, to permit restart mode */
3771 /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */
3772 if (hi2c
->State
== HAL_I2C_STATE_BUSY_TX
)
3774 hi2c
->State
= HAL_I2C_STATE_READY
;
3775 hi2c
->PreviousState
= I2C_STATE_MASTER_BUSY_TX
;
3776 hi2c
->XferISR
= NULL
;
3778 /* Disable Interrupts */
3779 I2C_Disable_IRQ(hi2c
, I2C_XFER_TX_IT
);
3781 /* Process Unlocked */
3784 /* Call the corresponding callback to inform upper layer of End of Transfer */
3785 HAL_I2C_MasterTxCpltCallback(hi2c
);
3787 /* hi2c->State == HAL_I2C_STATE_BUSY_RX */
3790 hi2c
->State
= HAL_I2C_STATE_READY
;
3791 hi2c
->PreviousState
= I2C_STATE_MASTER_BUSY_RX
;
3792 hi2c
->XferISR
= NULL
;
3794 /* Disable Interrupts */
3795 I2C_Disable_IRQ(hi2c
, I2C_XFER_RX_IT
);
3797 /* Process Unlocked */
3800 /* Call the corresponding callback to inform upper layer of End of Transfer */
3801 HAL_I2C_MasterRxCpltCallback(hi2c
);
3806 * @brief I2C Slave sequential complete process.
3807 * @param hi2c: I2C handle.
3810 static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef
*hi2c
)
3812 /* Reset I2C handle mode */
3813 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
3815 if(hi2c
->State
== HAL_I2C_STATE_BUSY_TX_LISTEN
)
3817 /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */
3818 hi2c
->State
= HAL_I2C_STATE_LISTEN
;
3819 hi2c
->PreviousState
= I2C_STATE_SLAVE_BUSY_TX
;
3821 /* Disable Interrupts */
3822 I2C_Disable_IRQ(hi2c
, I2C_XFER_TX_IT
);
3824 /* Process Unlocked */
3827 /* Call the Tx complete callback to inform upper layer of the end of transmit process */
3828 HAL_I2C_SlaveTxCpltCallback(hi2c
);
3831 else if(hi2c
->State
== HAL_I2C_STATE_BUSY_RX_LISTEN
)
3833 /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */
3834 hi2c
->State
= HAL_I2C_STATE_LISTEN
;
3835 hi2c
->PreviousState
= I2C_STATE_SLAVE_BUSY_RX
;
3837 /* Disable Interrupts */
3838 I2C_Disable_IRQ(hi2c
, I2C_XFER_RX_IT
);
3840 /* Process Unlocked */
3843 /* Call the Rx complete callback to inform upper layer of the end of receive process */
3844 HAL_I2C_SlaveRxCpltCallback(hi2c
);
3849 * @brief I2C Master complete process.
3850 * @param hi2c: I2C handle.
3851 * @param ITFlags: Interrupt flags to handle.
3854 static void I2C_ITMasterCplt(I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
)
3856 /* Clear STOP Flag */
3857 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
3859 /* Clear Configuration Register 2 */
3860 I2C_RESET_CR2(hi2c
);
3862 /* Reset handle parameters */
3863 hi2c
->PreviousState
= I2C_STATE_NONE
;
3864 hi2c
->XferISR
= NULL
;
3865 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
3867 if((ITFlags
& I2C_FLAG_AF
) != RESET
)
3869 /* Clear NACK Flag */
3870 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
3872 /* Set acknowledge error code */
3873 hi2c
->ErrorCode
|= HAL_I2C_ERROR_AF
;
3876 /* Flush TX register */
3877 I2C_Flush_TXDR(hi2c
);
3879 /* Disable Interrupts */
3880 I2C_Disable_IRQ(hi2c
, I2C_XFER_TX_IT
| I2C_XFER_RX_IT
);
3882 /* Call the corresponding callback to inform upper layer of End of Transfer */
3883 if(hi2c
->ErrorCode
!= HAL_I2C_ERROR_NONE
)
3885 /* Call the corresponding callback to inform upper layer of End of Transfer */
3886 I2C_ITError(hi2c
, hi2c
->ErrorCode
);
3888 /* hi2c->State == HAL_I2C_STATE_BUSY_TX */
3889 else if(hi2c
->State
== HAL_I2C_STATE_BUSY_TX
)
3891 hi2c
->State
= HAL_I2C_STATE_READY
;
3893 if (hi2c
->Mode
== HAL_I2C_MODE_MEM
)
3895 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
3897 /* Process Unlocked */
3900 /* Call the corresponding callback to inform upper layer of End of Transfer */
3901 HAL_I2C_MemTxCpltCallback(hi2c
);
3905 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
3907 /* Process Unlocked */
3910 /* Call the corresponding callback to inform upper layer of End of Transfer */
3911 HAL_I2C_MasterTxCpltCallback(hi2c
);
3914 /* hi2c->State == HAL_I2C_STATE_BUSY_RX */
3915 else if(hi2c
->State
== HAL_I2C_STATE_BUSY_RX
)
3917 hi2c
->State
= HAL_I2C_STATE_READY
;
3919 if (hi2c
->Mode
== HAL_I2C_MODE_MEM
)
3921 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
3923 /* Process Unlocked */
3926 HAL_I2C_MemRxCpltCallback(hi2c
);
3930 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
3932 /* Process Unlocked */
3935 HAL_I2C_MasterRxCpltCallback(hi2c
);
3941 * @brief I2C Slave complete process.
3942 * @param hi2c: I2C handle.
3943 * @param ITFlags: Interrupt flags to handle.
3946 static void I2C_ITSlaveCplt(I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
)
3948 /* Clear STOP Flag */
3949 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
3951 /* Clear ADDR flag */
3952 __HAL_I2C_CLEAR_FLAG(hi2c
,I2C_FLAG_ADDR
);
3954 /* Disable all interrupts */
3955 I2C_Disable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
| I2C_XFER_TX_IT
| I2C_XFER_RX_IT
);
3957 /* Disable Address Acknowledge */
3958 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
3960 /* Clear Configuration Register 2 */
3961 I2C_RESET_CR2(hi2c
);
3963 /* Flush TX register */
3964 I2C_Flush_TXDR(hi2c
);
3966 /* If a DMA is ongoing, Update handle size context */
3967 if(((hi2c
->Instance
->CR1
& I2C_CR1_TXDMAEN
) == I2C_CR1_TXDMAEN
) ||
3968 ((hi2c
->Instance
->CR1
& I2C_CR1_RXDMAEN
) == I2C_CR1_RXDMAEN
))
3970 if((hi2c
->XferSize
- I2C_GET_DMA_REMAIN_DATA(hi2c
)) != hi2c
->XferSize
)
3972 hi2c
->XferSize
= I2C_GET_DMA_REMAIN_DATA(hi2c
);
3973 hi2c
->XferCount
+= hi2c
->XferSize
;
3975 /* Set ErrorCode corresponding to a Non-Acknowledge */
3976 hi2c
->ErrorCode
|= HAL_I2C_ERROR_AF
;
3980 /* Store Last receive data if any */
3981 if(((ITFlags
& I2C_FLAG_RXNE
) != RESET
))
3983 /* Read data from RXDR */
3984 (*hi2c
->pBuffPtr
++) = hi2c
->Instance
->RXDR
;
3986 if((hi2c
->XferSize
> 0))
3991 /* Set ErrorCode corresponding to a Non-Acknowledge */
3992 hi2c
->ErrorCode
|= HAL_I2C_ERROR_AF
;
3996 hi2c
->PreviousState
= I2C_STATE_NONE
;
3997 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
3998 hi2c
->XferISR
= NULL
;
4000 if(hi2c
->ErrorCode
!= HAL_I2C_ERROR_NONE
)
4002 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
4003 hi2c
->State
= HAL_I2C_STATE_READY
;
4005 /* Call the corresponding callback to inform upper layer of End of Transfer */
4006 I2C_ITError(hi2c
, hi2c
->ErrorCode
);
4008 else if(hi2c
->XferOptions
!= I2C_NO_OPTION_FRAME
)
4010 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
4011 hi2c
->State
= HAL_I2C_STATE_READY
;
4013 /* Process Unlocked */
4016 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
4017 HAL_I2C_ListenCpltCallback(hi2c
);
4019 /* Call the corresponding callback to inform upper layer of End of Transfer */
4020 else if(hi2c
->State
== HAL_I2C_STATE_BUSY_RX
)
4022 hi2c
->State
= HAL_I2C_STATE_READY
;
4024 /* Process Unlocked */
4027 /* Call the Slave Rx Complete callback */
4028 HAL_I2C_SlaveRxCpltCallback(hi2c
);
4032 hi2c
->State
= HAL_I2C_STATE_READY
;
4034 /* Process Unlocked */
4037 /* Call the Slave Tx Complete callback */
4038 HAL_I2C_SlaveTxCpltCallback(hi2c
);
4043 * @brief I2C Listen complete process.
4044 * @param hi2c: I2C handle.
4045 * @param ITFlags: Interrupt flags to handle.
4048 static void I2C_ITListenCplt(I2C_HandleTypeDef
*hi2c
, uint32_t ITFlags
)
4050 /* Reset handle parameters */
4051 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
4052 hi2c
->PreviousState
= I2C_STATE_NONE
;
4053 hi2c
->State
= HAL_I2C_STATE_READY
;
4054 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
4055 hi2c
->XferISR
= NULL
;
4057 /* Store Last receive data if any */
4058 if(((ITFlags
& I2C_FLAG_RXNE
) != RESET
))
4060 /* Read data from RXDR */
4061 (*hi2c
->pBuffPtr
++) = hi2c
->Instance
->RXDR
;
4063 if((hi2c
->XferSize
> 0))
4068 /* Set ErrorCode corresponding to a Non-Acknowledge */
4069 hi2c
->ErrorCode
|= HAL_I2C_ERROR_AF
;
4073 /* Disable all Interrupts*/
4074 I2C_Disable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
| I2C_XFER_RX_IT
| I2C_XFER_TX_IT
);
4076 /* Clear NACK Flag */
4077 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
4079 /* Process Unlocked */
4082 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
4083 HAL_I2C_ListenCpltCallback(hi2c
);
4087 * @brief I2C interrupts error process.
4088 * @param hi2c: I2C handle.
4089 * @param ErrorCode: Error code to handle.
4092 static void I2C_ITError(I2C_HandleTypeDef
*hi2c
, uint32_t ErrorCode
)
4094 /* Reset handle parameters */
4095 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
4096 hi2c
->XferOptions
= I2C_NO_OPTION_FRAME
;
4097 hi2c
->XferCount
= 0;
4099 /* Set new error code */
4100 hi2c
->ErrorCode
|= ErrorCode
;
4102 /* Disable Interrupts */
4103 if((hi2c
->State
== HAL_I2C_STATE_LISTEN
) ||
4104 (hi2c
->State
== HAL_I2C_STATE_BUSY_TX_LISTEN
) ||
4105 (hi2c
->State
== HAL_I2C_STATE_BUSY_RX_LISTEN
))
4107 /* Disable all interrupts, except interrupts related to LISTEN state */
4108 I2C_Disable_IRQ(hi2c
, I2C_XFER_RX_IT
| I2C_XFER_TX_IT
);
4110 /* keep HAL_I2C_STATE_LISTEN if set */
4111 hi2c
->State
= HAL_I2C_STATE_LISTEN
;
4112 hi2c
->PreviousState
= I2C_STATE_NONE
;
4113 hi2c
->XferISR
= I2C_Slave_ISR_IT
;
4117 /* Disable all interrupts */
4118 I2C_Disable_IRQ(hi2c
, I2C_XFER_LISTEN_IT
| I2C_XFER_RX_IT
| I2C_XFER_TX_IT
);
4120 /* Set HAL_I2C_STATE_READY */
4121 hi2c
->State
= HAL_I2C_STATE_READY
;
4122 hi2c
->PreviousState
= I2C_STATE_NONE
;
4123 hi2c
->XferISR
= NULL
;
4126 /* Abort DMA TX transfer if any */
4127 if((hi2c
->Instance
->CR1
& I2C_CR1_TXDMAEN
) == I2C_CR1_TXDMAEN
)
4129 hi2c
->Instance
->CR1
&= ~I2C_CR1_TXDMAEN
;
4131 /* Set the I2C DMA Abort callback :
4132 will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
4133 hi2c
->hdmatx
->XferAbortCallback
= I2C_DMAAbort
;
4135 /* Process Unlocked */
4139 if(HAL_DMA_Abort_IT(hi2c
->hdmatx
) != HAL_OK
)
4141 /* Call Directly XferAbortCallback function in case of error */
4142 hi2c
->hdmatx
->XferAbortCallback(hi2c
->hdmatx
);
4145 /* Abort DMA RX transfer if any */
4146 else if((hi2c
->Instance
->CR1
& I2C_CR1_RXDMAEN
) == I2C_CR1_RXDMAEN
)
4148 hi2c
->Instance
->CR1
&= ~I2C_CR1_RXDMAEN
;
4150 /* Set the I2C DMA Abort callback :
4151 will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
4152 hi2c
->hdmarx
->XferAbortCallback
= I2C_DMAAbort
;
4154 /* Process Unlocked */
4158 if(HAL_DMA_Abort_IT(hi2c
->hdmarx
) != HAL_OK
)
4160 /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
4161 hi2c
->hdmarx
->XferAbortCallback(hi2c
->hdmarx
);
4164 else if(hi2c
->ErrorCode
== HAL_I2C_ERROR_ABORT
)
4166 hi2c
->ErrorCode
&= ~HAL_I2C_ERROR_ABORT
;
4168 /* Process Unlocked */
4171 /* Call the corresponding callback to inform upper layer of End of Transfer */
4172 HAL_I2C_AbortCpltCallback(hi2c
);
4176 /* Process Unlocked */
4179 /* Call the corresponding callback to inform upper layer of End of Transfer */
4180 HAL_I2C_ErrorCallback(hi2c
);
4185 * @brief I2C Tx data register flush process.
4186 * @param hi2c: I2C handle.
4189 static void I2C_Flush_TXDR(I2C_HandleTypeDef
*hi2c
)
4191 /* If a pending TXIS flag is set */
4192 /* Write a dummy data in TXDR to clear it */
4193 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_TXIS
) != RESET
)
4195 hi2c
->Instance
->TXDR
= 0x00;
4198 /* Flush TX register if not empty */
4199 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_TXE
) == RESET
)
4201 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_TXE
);
4206 * @brief DMA I2C master transmit process complete callback.
4207 * @param hdma: DMA handle
4210 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef
*hdma
)
4212 I2C_HandleTypeDef
* hi2c
= (I2C_HandleTypeDef
*)((DMA_HandleTypeDef
*)hdma
)->Parent
;
4214 /* Disable DMA Request */
4215 hi2c
->Instance
->CR1
&= ~I2C_CR1_TXDMAEN
;
4217 /* If last transfer, enable STOP interrupt */
4218 if(hi2c
->XferCount
== 0)
4220 /* Enable STOP interrupt */
4221 I2C_Enable_IRQ(hi2c
, I2C_XFER_CPLT_IT
);
4223 /* else prepare a new DMA transfer and enable TCReload interrupt */
4226 /* Update Buffer pointer */
4227 hi2c
->pBuffPtr
+= hi2c
->XferSize
;
4229 /* Set the XferSize to transfer */
4230 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
4232 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
4236 hi2c
->XferSize
= hi2c
->XferCount
;
4239 /* Enable the DMA channel */
4240 HAL_DMA_Start_IT(hi2c
->hdmatx
, (uint32_t)hi2c
->pBuffPtr
, (uint32_t)&hi2c
->Instance
->TXDR
, hi2c
->XferSize
);
4242 /* Enable TC interrupts */
4243 I2C_Enable_IRQ(hi2c
, I2C_XFER_RELOAD_IT
);
4248 * @brief DMA I2C slave transmit process complete callback.
4249 * @param hdma: DMA handle
4252 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef
*hdma
)
4254 /* No specific action, Master fully manage the generation of STOP condition */
4255 /* Mean that this generation can arrive at any time, at the end or during DMA process */
4256 /* So STOP condition should be manage through Interrupt treatment */
4260 * @brief DMA I2C master receive process complete callback.
4261 * @param hdma: DMA handle
4264 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef
*hdma
)
4266 I2C_HandleTypeDef
* hi2c
= (I2C_HandleTypeDef
*)((DMA_HandleTypeDef
*)hdma
)->Parent
;
4268 /* Disable DMA Request */
4269 hi2c
->Instance
->CR1
&= ~I2C_CR1_RXDMAEN
;
4271 /* If last transfer, enable STOP interrupt */
4272 if(hi2c
->XferCount
== 0)
4274 /* Enable STOP interrupt */
4275 I2C_Enable_IRQ(hi2c
, I2C_XFER_CPLT_IT
);
4277 /* else prepare a new DMA transfer and enable TCReload interrupt */
4280 /* Update Buffer pointer */
4281 hi2c
->pBuffPtr
+= hi2c
->XferSize
;
4283 /* Set the XferSize to transfer */
4284 if(hi2c
->XferCount
> MAX_NBYTE_SIZE
)
4286 hi2c
->XferSize
= MAX_NBYTE_SIZE
;
4290 hi2c
->XferSize
= hi2c
->XferCount
;
4293 /* Enable the DMA channel */
4294 HAL_DMA_Start_IT(hi2c
->hdmarx
, (uint32_t)&hi2c
->Instance
->RXDR
, (uint32_t)hi2c
->pBuffPtr
, hi2c
->XferSize
);
4296 /* Enable TC interrupts */
4297 I2C_Enable_IRQ(hi2c
, I2C_XFER_RELOAD_IT
);
4302 * @brief DMA I2C slave receive process complete callback.
4303 * @param hdma: DMA handle
4306 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef
*hdma
)
4308 /* No specific action, Master fully manage the generation of STOP condition */
4309 /* Mean that this generation can arrive at any time, at the end or during DMA process */
4310 /* So STOP condition should be manage through Interrupt treatment */
4314 * @brief DMA I2C communication error callback.
4315 * @param hdma: DMA handle
4318 static void I2C_DMAError(DMA_HandleTypeDef
*hdma
)
4320 I2C_HandleTypeDef
* hi2c
= ( I2C_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
4322 /* Disable Acknowledge */
4323 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
4325 /* Call the corresponding callback to inform upper layer of End of Transfer */
4326 I2C_ITError(hi2c
, HAL_I2C_ERROR_DMA
);
4330 * @brief DMA I2C communication abort callback
4331 * (To be called at end of DMA Abort procedure).
4332 * @param hdma: DMA handle.
4335 static void I2C_DMAAbort(DMA_HandleTypeDef
*hdma
)
4337 I2C_HandleTypeDef
* hi2c
= ( I2C_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
4339 /* Disable Acknowledge */
4340 hi2c
->Instance
->CR2
|= I2C_CR2_NACK
;
4342 /* Reset AbortCpltCallback */
4343 hi2c
->hdmatx
->XferAbortCallback
= NULL
;
4344 hi2c
->hdmarx
->XferAbortCallback
= NULL
;
4346 /* Check if come from abort from user */
4347 if(hi2c
->ErrorCode
== HAL_I2C_ERROR_ABORT
)
4349 hi2c
->ErrorCode
&= ~HAL_I2C_ERROR_ABORT
;
4351 /* Call the corresponding callback to inform upper layer of End of Transfer */
4352 HAL_I2C_AbortCpltCallback(hi2c
);
4356 /* Call the corresponding callback to inform upper layer of End of Transfer */
4357 HAL_I2C_ErrorCallback(hi2c
);
4362 * @brief This function handles I2C Communication Timeout.
4363 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
4364 * the configuration information for the specified I2C.
4365 * @param Flag: Specifies the I2C flag to check.
4366 * @param Status: The new Flag status (SET or RESET).
4367 * @param Timeout: Timeout duration
4368 * @param Tickstart: Tick start value
4369 * @retval HAL status
4371 static HAL_StatusTypeDef
I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef
*hi2c
, uint32_t Flag
, FlagStatus Status
, uint32_t Timeout
, uint32_t Tickstart
)
4373 while((__HAL_I2C_GET_FLAG(hi2c
, Flag
) ? SET
: RESET
) == Status
)
4375 /* Check for the Timeout */
4376 if(Timeout
!= HAL_MAX_DELAY
)
4378 if((Timeout
== 0)||((HAL_GetTick() - Tickstart
) > Timeout
))
4380 hi2c
->State
= HAL_I2C_STATE_READY
;
4381 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
4383 /* Process Unlocked */
4393 * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag.
4394 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
4395 * the configuration information for the specified I2C.
4396 * @param Timeout: Timeout duration
4397 * @param Tickstart: Tick start value
4398 * @retval HAL status
4400 static HAL_StatusTypeDef
I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef
*hi2c
, uint32_t Timeout
, uint32_t Tickstart
)
4402 while(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_TXIS
) == RESET
)
4404 /* Check if a NACK is detected */
4405 if(I2C_IsAcknowledgeFailed(hi2c
, Timeout
, Tickstart
) != HAL_OK
)
4410 /* Check for the Timeout */
4411 if(Timeout
!= HAL_MAX_DELAY
)
4413 if((Timeout
== 0)||((HAL_GetTick() - Tickstart
) > Timeout
))
4415 hi2c
->ErrorCode
|= HAL_I2C_ERROR_TIMEOUT
;
4416 hi2c
->State
= HAL_I2C_STATE_READY
;
4417 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
4419 /* Process Unlocked */
4430 * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
4431 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
4432 * the configuration information for the specified I2C.
4433 * @param Timeout: Timeout duration
4434 * @param Tickstart: Tick start value
4435 * @retval HAL status
4437 static HAL_StatusTypeDef
I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef
*hi2c
, uint32_t Timeout
, uint32_t Tickstart
)
4439 while(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_STOPF
) == RESET
)
4441 /* Check if a NACK is detected */
4442 if(I2C_IsAcknowledgeFailed(hi2c
, Timeout
, Tickstart
) != HAL_OK
)
4447 /* Check for the Timeout */
4448 if((Timeout
== 0)||((HAL_GetTick() - Tickstart
) > Timeout
))
4450 hi2c
->ErrorCode
|= HAL_I2C_ERROR_TIMEOUT
;
4451 hi2c
->State
= HAL_I2C_STATE_READY
;
4452 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
4454 /* Process Unlocked */
4464 * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
4465 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
4466 * the configuration information for the specified I2C.
4467 * @param Timeout: Timeout duration
4468 * @param Tickstart: Tick start value
4469 * @retval HAL status
4471 static HAL_StatusTypeDef
I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef
*hi2c
, uint32_t Timeout
, uint32_t Tickstart
)
4473 while(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_RXNE
) == RESET
)
4475 /* Check if a NACK is detected */
4476 if(I2C_IsAcknowledgeFailed(hi2c
, Timeout
, Tickstart
) != HAL_OK
)
4481 /* Check if a STOPF is detected */
4482 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_STOPF
) == SET
)
4484 /* Clear STOP Flag */
4485 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
4487 /* Clear Configuration Register 2 */
4488 I2C_RESET_CR2(hi2c
);
4490 hi2c
->ErrorCode
= HAL_I2C_ERROR_NONE
;
4491 hi2c
->State
= HAL_I2C_STATE_READY
;
4492 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
4494 /* Process Unlocked */
4500 /* Check for the Timeout */
4501 if((Timeout
== 0)||((HAL_GetTick() - Tickstart
) > Timeout
))
4503 hi2c
->ErrorCode
|= HAL_I2C_ERROR_TIMEOUT
;
4504 hi2c
->State
= HAL_I2C_STATE_READY
;
4506 /* Process Unlocked */
4516 * @brief This function handles Acknowledge failed detection during an I2C Communication.
4517 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
4518 * the configuration information for the specified I2C.
4519 * @param Timeout: Timeout duration
4520 * @param Tickstart: Tick start value
4521 * @retval HAL status
4523 static HAL_StatusTypeDef
I2C_IsAcknowledgeFailed(I2C_HandleTypeDef
*hi2c
, uint32_t Timeout
, uint32_t Tickstart
)
4525 if(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_AF
) == SET
)
4527 /* Wait until STOP Flag is reset */
4528 /* AutoEnd should be initiate after AF */
4529 while(__HAL_I2C_GET_FLAG(hi2c
, I2C_FLAG_STOPF
) == RESET
)
4531 /* Check for the Timeout */
4532 if(Timeout
!= HAL_MAX_DELAY
)
4534 if((Timeout
== 0)||((HAL_GetTick() - Tickstart
) > Timeout
))
4536 hi2c
->State
= HAL_I2C_STATE_READY
;
4537 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
4539 /* Process Unlocked */
4546 /* Clear NACKF Flag */
4547 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_AF
);
4549 /* Clear STOP Flag */
4550 __HAL_I2C_CLEAR_FLAG(hi2c
, I2C_FLAG_STOPF
);
4552 /* Flush TX register */
4553 I2C_Flush_TXDR(hi2c
);
4555 /* Clear Configuration Register 2 */
4556 I2C_RESET_CR2(hi2c
);
4558 hi2c
->ErrorCode
= HAL_I2C_ERROR_AF
;
4559 hi2c
->State
= HAL_I2C_STATE_READY
;
4560 hi2c
->Mode
= HAL_I2C_MODE_NONE
;
4562 /* Process Unlocked */
4571 * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
4572 * @param hi2c: I2C handle.
4573 * @param DevAddress: Specifies the slave address to be programmed.
4574 * @param Size: Specifies the number of bytes to be programmed.
4575 * This parameter must be a value between 0 and 255.
4576 * @param Mode: New state of the I2C START condition generation.
4577 * This parameter can be a value of @ref I2C_RELOAD_END_MODE.
4578 * @param Request: New state of the I2C START condition generation.
4579 * This parameter can be a value of I2C_START_STOP_MODE.
4582 static void I2C_TransferConfig(I2C_HandleTypeDef
*hi2c
, uint16_t DevAddress
, uint8_t Size
, uint32_t Mode
, uint32_t Request
)
4584 uint32_t tmpreg
= 0;
4586 /* Check the parameters */
4587 assert_param(IS_I2C_ALL_INSTANCE(hi2c
->Instance
));
4588 assert_param(IS_TRANSFER_MODE(Mode
));
4589 assert_param(IS_TRANSFER_REQUEST(Request
));
4591 /* Get the CR2 register value */
4592 tmpreg
= hi2c
->Instance
->CR2
;
4594 /* clear tmpreg specific bits */
4595 tmpreg
&= (uint32_t)~((uint32_t)(I2C_CR2_SADD
| I2C_CR2_NBYTES
| I2C_CR2_RELOAD
| I2C_CR2_AUTOEND
| I2C_CR2_RD_WRN
| I2C_CR2_START
| I2C_CR2_STOP
));
4598 tmpreg
|= (uint32_t)(((uint32_t)DevAddress
& I2C_CR2_SADD
) | (((uint32_t)Size
<< 16 ) & I2C_CR2_NBYTES
) | \
4599 (uint32_t)Mode
| (uint32_t)Request
);
4601 /* update CR2 register */
4602 hi2c
->Instance
->CR2
= tmpreg
;
4606 * @brief Manage the enabling of Interrupts.
4607 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
4608 * the configuration information for the specified I2C.
4609 * @param InterruptRequest: Value of @ref I2C_Interrupt_configuration_definition.
4610 * @retval HAL status
4612 static HAL_StatusTypeDef
I2C_Enable_IRQ(I2C_HandleTypeDef
*hi2c
, uint16_t InterruptRequest
)
4614 uint32_t tmpisr
= 0;
4616 if((hi2c
->XferISR
== I2C_Master_ISR_DMA
) || \
4617 (hi2c
->XferISR
== I2C_Slave_ISR_DMA
))
4619 if((InterruptRequest
& I2C_XFER_LISTEN_IT
) == I2C_XFER_LISTEN_IT
)
4621 /* Enable ERR, STOP, NACK and ADDR interrupts */
4622 tmpisr
|= I2C_IT_ADDRI
| I2C_IT_STOPI
| I2C_IT_NACKI
| I2C_IT_ERRI
;
4625 if((InterruptRequest
& I2C_XFER_ERROR_IT
) == I2C_XFER_ERROR_IT
)
4627 /* Enable ERR and NACK interrupts */
4628 tmpisr
|= I2C_IT_ERRI
| I2C_IT_NACKI
;
4631 if((InterruptRequest
& I2C_XFER_CPLT_IT
) == I2C_XFER_CPLT_IT
)
4633 /* Enable STOP interrupts */
4634 tmpisr
|= I2C_IT_STOPI
;
4637 if((InterruptRequest
& I2C_XFER_RELOAD_IT
) == I2C_XFER_RELOAD_IT
)
4639 /* Enable TC interrupts */
4640 tmpisr
|= I2C_IT_TCI
;
4645 if((InterruptRequest
& I2C_XFER_LISTEN_IT
) == I2C_XFER_LISTEN_IT
)
4647 /* Enable ERR, STOP, NACK, and ADDR interrupts */
4648 tmpisr
|= I2C_IT_ADDRI
| I2C_IT_STOPI
| I2C_IT_NACKI
| I2C_IT_ERRI
;
4651 if((InterruptRequest
& I2C_XFER_TX_IT
) == I2C_XFER_TX_IT
)
4653 /* Enable ERR, TC, STOP, NACK and RXI interrupts */
4654 tmpisr
|= I2C_IT_ERRI
| I2C_IT_TCI
| I2C_IT_STOPI
| I2C_IT_NACKI
| I2C_IT_TXI
;
4657 if((InterruptRequest
& I2C_XFER_RX_IT
) == I2C_XFER_RX_IT
)
4659 /* Enable ERR, TC, STOP, NACK and TXI interrupts */
4660 tmpisr
|= I2C_IT_ERRI
| I2C_IT_TCI
| I2C_IT_STOPI
| I2C_IT_NACKI
| I2C_IT_RXI
;
4663 if((InterruptRequest
& I2C_XFER_CPLT_IT
) == I2C_XFER_CPLT_IT
)
4665 /* Enable STOP interrupts */
4666 tmpisr
|= I2C_IT_STOPI
;
4670 /* Enable interrupts only at the end */
4671 /* to avoid the risk of I2C interrupt handle execution before */
4672 /* all interrupts requested done */
4673 __HAL_I2C_ENABLE_IT(hi2c
, tmpisr
);
4679 * @brief Manage the disabling of Interrupts.
4680 * @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
4681 * the configuration information for the specified I2C.
4682 * @param InterruptRequest: Value of @ref I2C_Interrupt_configuration_definition.
4683 * @retval HAL status
4685 static HAL_StatusTypeDef
I2C_Disable_IRQ(I2C_HandleTypeDef
*hi2c
, uint16_t InterruptRequest
)
4687 uint32_t tmpisr
= 0;
4689 if((InterruptRequest
& I2C_XFER_TX_IT
) == I2C_XFER_TX_IT
)
4691 /* Disable TC and TXI interrupts */
4692 tmpisr
|= I2C_IT_TCI
| I2C_IT_TXI
;
4694 if((hi2c
->State
& HAL_I2C_STATE_LISTEN
) != HAL_I2C_STATE_LISTEN
)
4696 /* Disable NACK and STOP interrupts */
4697 tmpisr
|= I2C_IT_STOPI
| I2C_IT_NACKI
| I2C_IT_ERRI
;
4701 if((InterruptRequest
& I2C_XFER_RX_IT
) == I2C_XFER_RX_IT
)
4703 /* Disable TC and RXI interrupts */
4704 tmpisr
|= I2C_IT_TCI
| I2C_IT_RXI
;
4706 if((hi2c
->State
& HAL_I2C_STATE_LISTEN
) != HAL_I2C_STATE_LISTEN
)
4708 /* Disable NACK and STOP interrupts */
4709 tmpisr
|= I2C_IT_STOPI
| I2C_IT_NACKI
| I2C_IT_ERRI
;
4713 if((InterruptRequest
& I2C_XFER_LISTEN_IT
) == I2C_XFER_LISTEN_IT
)
4715 /* Disable ADDR, NACK and STOP interrupts */
4716 tmpisr
|= I2C_IT_ADDRI
| I2C_IT_STOPI
| I2C_IT_NACKI
| I2C_IT_ERRI
;
4719 if((InterruptRequest
& I2C_XFER_ERROR_IT
) == I2C_XFER_ERROR_IT
)
4721 /* Enable ERR and NACK interrupts */
4722 tmpisr
|= I2C_IT_ERRI
| I2C_IT_NACKI
;
4725 if((InterruptRequest
& I2C_XFER_CPLT_IT
) == I2C_XFER_CPLT_IT
)
4727 /* Enable STOP interrupts */
4728 tmpisr
|= I2C_IT_STOPI
;
4731 if((InterruptRequest
& I2C_XFER_RELOAD_IT
) == I2C_XFER_RELOAD_IT
)
4733 /* Enable TC interrupts */
4734 tmpisr
|= I2C_IT_TCI
;
4737 /* Disable interrupts only at the end */
4738 /* to avoid a breaking situation like at "t" time */
4739 /* all disable interrupts request are not done */
4740 __HAL_I2C_DISABLE_IT(hi2c
, tmpisr
);
4749 #endif /* HAL_I2C_MODULE_ENABLED */
4758 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/