a0df5640b372b30a4d7f664e659f13e03ad15f8b
[mTask.git] / int / com / lib / STM32F7xx_HAL_Driver / Src / stm32f7xx_hal_spdifrx.c
1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_spdifrx.c
4 * @author MCD Application Team
5 * @version V1.1.0
6 * @date 22-April-2016
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the SPDIFRX audio interface:
9 * + Initialization and Configuration
10 * + Data transfers functions
11 * + DMA transfers management
12 * + Interrupts and flags management
13 @verbatim
14 ===============================================================================
15 ##### How to use this driver #####
16 ===============================================================================
17 [..]
18 The SPDIFRX HAL driver can be used as follow:
19
20 (#) Declare SPDIFRX_HandleTypeDef handle structure.
21 (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
22 (##) Enable the SPDIFRX interface clock.
23 (##) SPDIFRX pins configuration:
24 (+++) Enable the clock for the SPDIFRX GPIOs.
25 (+++) Configure these SPDIFRX pins as alternate function pull-up.
26 (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
27 (+++) Configure the SPDIFRX interrupt priority.
28 (+++) Enable the NVIC SPDIFRX IRQ handle.
29 (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
30 (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
31 (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
32 (+++) Enable the DMAx interface clock.
33 (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
34 (+++) Configure the DMA Channel.
35 (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
36 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
37 DMA CtrlRx/DataRx channel.
38
39 (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
40 using HAL_SPDIFRX_Init() function.
41
42 -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
43 __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
44 -@- Make sure that ck_spdif clock is configured.
45
46 (#) Three operation modes are available within this driver :
47
48 *** Polling mode for reception operation (for debug purpose) ***
49 ================================================================
50 [..]
51 (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
52 (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
53
54 *** Interrupt mode for reception operation ***
55 =========================================
56 [..]
57 (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
58 (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT()
59 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
60 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
61 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
62 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
63 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
64 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
65
66 *** DMA mode for reception operation ***
67 ========================================
68 [..]
69 (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
70 (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
71 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
72 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
73 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
74 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
75 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
76 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
77 (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
78
79 *** SPDIFRX HAL driver macros list ***
80 =============================================
81 [..]
82 Below the list of most used macros in USART HAL driver.
83 (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
84 (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
85 (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
86 (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
87 (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
88 (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
89
90 [..]
91 (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
92
93 @endverbatim
94 ******************************************************************************
95 * @attention
96 *
97 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
98 *
99 * Redistribution and use in source and binary forms, with or without modification,
100 * are permitted provided that the following conditions are met:
101 * 1. Redistributions of source code must retain the above copyright notice,
102 * this list of conditions and the following disclaimer.
103 * 2. Redistributions in binary form must reproduce the above copyright notice,
104 * this list of conditions and the following disclaimer in the documentation
105 * and/or other materials provided with the distribution.
106 * 3. Neither the name of STMicroelectronics nor the names of its contributors
107 * may be used to endorse or promote products derived from this software
108 * without specific prior written permission.
109 *
110 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
111 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
112 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
113 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
114 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
115 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
116 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
117 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
118 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
119 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
120 *
121 ******************************************************************************
122 */
123
124 /* Includes ------------------------------------------------------------------*/
125 #include "stm32f7xx_hal.h"
126
127 /** @addtogroup STM32F7xx_HAL_Driver
128 * @{
129 */
130 /** @defgroup SPDIFRX SPDIFRX
131 * @brief SPDIFRX HAL module driver
132 * @{
133 */
134
135 #ifdef HAL_SPDIFRX_MODULE_ENABLED
136
137 /* Private typedef -----------------------------------------------------------*/
138 /* Private define ------------------------------------------------------------*/
139 #define SPDIFRX_TIMEOUT_VALUE 0xFFFF
140
141 /* Private macro -------------------------------------------------------------*/
142 /* Private variables ---------------------------------------------------------*/
143 /* Private function prototypes -----------------------------------------------*/
144 /** @addtogroup SPDIFRX_Private_Functions
145 * @{
146 */
147 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
148 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
149 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
150 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
151 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
152 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
153 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
154 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t tickstart);
155 /**
156 * @}
157 */
158 /* Exported functions ---------------------------------------------------------*/
159
160 /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
161 * @{
162 */
163
164 /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
165 * @brief Initialization and Configuration functions
166 *
167 @verbatim
168 ===============================================================================
169 ##### Initialization and de-initialization functions #####
170 ===============================================================================
171 [..] This subsection provides a set of functions allowing to initialize and
172 de-initialize the SPDIFRX peripheral:
173
174 (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
175 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
176
177 (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
178 the selected configuration:
179 (++) Input Selection (IN0, IN1,...)
180 (++) Maximum allowed re-tries during synchronization phase
181 (++) Wait for activity on SPDIF selected input
182 (++) Channel status selection (from channel A or B)
183 (++) Data format (LSB, MSB, ...)
184 (++) Stereo mode
185 (++) User bits masking (PT,C,U,V,...)
186
187 (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
188 of the selected SPDIFRXx peripheral.
189 @endverbatim
190 * @{
191 */
192
193 /**
194 * @brief Initializes the SPDIFRX according to the specified parameters
195 * in the SPDIFRX_InitTypeDef and create the associated handle.
196 * @param hspdif: SPDIFRX handle
197 * @retval HAL status
198 */
199 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
200 {
201 uint32_t tmpreg = 0;
202
203 /* Check the SPDIFRX handle allocation */
204 if(hspdif == NULL)
205 {
206 return HAL_ERROR;
207 }
208
209 /* Check the SPDIFRX parameters */
210 assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
211 assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
212 assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
213 assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
214 assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
215 assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
216 assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
217 assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
218 assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
219 assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
220
221 if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
222 {
223 /* Allocate lock resource and initialize it */
224 hspdif->Lock = HAL_UNLOCKED;
225 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
226 HAL_SPDIFRX_MspInit(hspdif);
227 }
228
229 /* SPDIFRX peripheral state is BUSY*/
230 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
231
232 /* Disable SPDIFRX interface (IDLE State) */
233 __HAL_SPDIFRX_IDLE(hspdif);
234
235 /* Reset the old SPDIFRX CR configuration */
236 tmpreg = hspdif->Instance->CR;
237
238 tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
239 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
240 SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA | SPDIFRX_CR_INSEL);
241
242 /* Sets the new configuration of the SPDIFRX peripheral */
243 tmpreg |= ((uint16_t) hspdif->Init.StereoMode |
244 hspdif->Init.InputSelection |
245 hspdif->Init.Retries |
246 hspdif->Init.WaitForActivity |
247 hspdif->Init.ChannelSelection |
248 hspdif->Init.DataFormat |
249 hspdif->Init.PreambleTypeMask |
250 hspdif->Init.ChannelStatusMask |
251 hspdif->Init.ValidityBitMask |
252 hspdif->Init.ParityErrorMask);
253
254 hspdif->Instance->CR = tmpreg;
255
256 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
257
258 /* SPDIFRX peripheral state is READY*/
259 hspdif->State = HAL_SPDIFRX_STATE_READY;
260
261 return HAL_OK;
262 }
263
264 /**
265 * @brief DeInitializes the SPDIFRX peripheral
266 * @param hspdif: SPDIFRX handle
267 * @retval HAL status
268 */
269 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
270 {
271 /* Check the SPDIFRX handle allocation */
272 if(hspdif == NULL)
273 {
274 return HAL_ERROR;
275 }
276
277 /* Check the parameters */
278 assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
279
280 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
281
282 /* Disable SPDIFRX interface (IDLE state) */
283 __HAL_SPDIFRX_IDLE(hspdif);
284
285 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
286 HAL_SPDIFRX_MspDeInit(hspdif);
287
288 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
289
290 /* SPDIFRX peripheral state is RESET*/
291 hspdif->State = HAL_SPDIFRX_STATE_RESET;
292
293 /* Release Lock */
294 __HAL_UNLOCK(hspdif);
295
296 return HAL_OK;
297 }
298
299 /**
300 * @brief SPDIFRX MSP Init
301 * @param hspdif: SPDIFRX handle
302 * @retval None
303 */
304 __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
305 {
306 /* Prevent unused argument(s) compilation warning */
307 UNUSED(hspdif);
308
309 /* NOTE : This function Should not be modified, when the callback is needed,
310 the HAL_SPDIFRX_MspInit could be implemented in the user file
311 */
312 }
313
314 /**
315 * @brief SPDIFRX MSP DeInit
316 * @param hspdif: SPDIFRX handle
317 * @retval None
318 */
319 __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
320 {
321 /* Prevent unused argument(s) compilation warning */
322 UNUSED(hspdif);
323
324 /* NOTE : This function Should not be modified, when the callback is needed,
325 the HAL_SPDIFRX_MspDeInit could be implemented in the user file
326 */
327 }
328
329 /**
330 * @brief Sets the SPDIFRX dtat format according to the specified parameters
331 * in the SPDIFRX_InitTypeDef.
332 * @param hspdif: SPDIFRX handle
333 * @param sDataFormat: SPDIFRX data format
334 * @retval HAL status
335 */
336 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
337 {
338 uint32_t tmpreg = 0;
339
340 /* Check the SPDIFRX handle allocation */
341 if(hspdif == NULL)
342 {
343 return HAL_ERROR;
344 }
345
346 /* Check the SPDIFRX parameters */
347 assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
348 assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
349 assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
350 assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
351 assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
352 assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
353
354 /* Reset the old SPDIFRX CR configuration */
355 tmpreg = hspdif->Instance->CR;
356
357 if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
358 (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
359 ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
360 {
361 return HAL_ERROR;
362 }
363
364 tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
365 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
366
367 /* Sets the new configuration of the SPDIFRX peripheral */
368 tmpreg |= ((uint16_t) sDataFormat.StereoMode |
369 sDataFormat.DataFormat |
370 sDataFormat.PreambleTypeMask |
371 sDataFormat.ChannelStatusMask |
372 sDataFormat.ValidityBitMask |
373 sDataFormat.ParityErrorMask);
374
375 hspdif->Instance->CR = tmpreg;
376
377 return HAL_OK;
378 }
379
380 /**
381 * @}
382 */
383
384 /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
385 * @brief Data transfers functions
386 *
387 @verbatim
388 ===============================================================================
389 ##### IO operation functions #####
390 ===============================================================================
391 [..]
392 This subsection provides a set of functions allowing to manage the SPDIFRX data
393 transfers.
394
395 (#) There is two mode of transfer:
396 (++) Blocking mode : The communication is performed in the polling mode.
397 The status of all data processing is returned by the same function
398 after finishing transfer.
399 (++) No-Blocking mode : The communication is performed using Interrupts
400 or DMA. These functions return the status of the transfer start-up.
401 The end of the data processing will be indicated through the
402 dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
403 using DMA mode.
404
405 (#) Blocking mode functions are :
406 (++) HAL_SPDIFRX_ReceiveDataFlow()
407 (++) HAL_SPDIFRX_ReceiveControlFlow()
408 (+@) Do not use blocking mode to receive both control and data flow at the same time.
409
410 (#) No-Blocking mode functions with Interrupt are :
411 (++) HAL_SPDIFRX_ReceiveControlFlow_IT()
412 (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
413
414 (#) No-Blocking mode functions with DMA are :
415 (++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
416 (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
417
418 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
419 (++) HAL_SPDIFRX_RxCpltCallback()
420 (++) HAL_SPDIFRX_ErrorCallback()
421
422 @endverbatim
423 * @{
424 */
425
426
427 /**
428 * @brief Receives an amount of data (Data Flow) in blocking mode.
429 * @param hspdif: pointer to SPDIFRX_HandleTypeDef structure that contains
430 * the configuration information for SPDIFRX module.
431 * @param pData: Pointer to data buffer
432 * @param Size: Amount of data to be received
433 * @param Timeout: Timeout duration
434 * @retval HAL status
435 */
436 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
437 {
438 uint32_t tickstart = 0U;
439
440 if((pData == NULL ) || (Size == 0U))
441 {
442 return HAL_ERROR;
443 }
444
445 if(hspdif->State == HAL_SPDIFRX_STATE_READY)
446 {
447 /* Process Locked */
448 __HAL_LOCK(hspdif);
449
450 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
451
452 /* Start synchronisation */
453 __HAL_SPDIFRX_SYNC(hspdif);
454
455 /* Get tick */
456 tickstart = HAL_GetTick();
457
458 /* Wait until SYNCD flag is set */
459 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
460 {
461 return HAL_TIMEOUT;
462 }
463
464 /* Start reception */
465 __HAL_SPDIFRX_RCV(hspdif);
466
467 /* Receive data flow */
468 while(Size > 0U)
469 {
470 /* Get tick */
471 tickstart = HAL_GetTick();
472
473 /* Wait until RXNE flag is set */
474 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
475 {
476 return HAL_TIMEOUT;
477 }
478
479 (*pData++) = hspdif->Instance->DR;
480 Size--;
481 }
482
483 /* SPDIFRX ready */
484 hspdif->State = HAL_SPDIFRX_STATE_READY;
485
486 /* Process Unlocked */
487 __HAL_UNLOCK(hspdif);
488
489 return HAL_OK;
490 }
491 else
492 {
493 return HAL_BUSY;
494 }
495 }
496
497 /**
498 * @brief Receives an amount of data (Control Flow) in blocking mode.
499 * @param hspdif: pointer to a SPDIFRX_HandleTypeDef structure that contains
500 * the configuration information for SPDIFRX module.
501 * @param pData: Pointer to data buffer
502 * @param Size: Amount of data to be received
503 * @param Timeout: Timeout duration
504 * @retval HAL status
505 */
506 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
507 {
508 uint32_t tickstart = 0U;
509
510 if((pData == NULL ) || (Size == 0U))
511 {
512 return HAL_ERROR;
513 }
514
515 if(hspdif->State == HAL_SPDIFRX_STATE_READY)
516 {
517 /* Process Locked */
518 __HAL_LOCK(hspdif);
519
520 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
521
522 /* Start synchronization */
523 __HAL_SPDIFRX_SYNC(hspdif);
524
525 /* Get tick */
526 tickstart = HAL_GetTick();
527
528 /* Wait until SYNCD flag is set */
529 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
530 {
531 return HAL_TIMEOUT;
532 }
533
534 /* Start reception */
535 __HAL_SPDIFRX_RCV(hspdif);
536
537 /* Receive control flow */
538 while(Size > 0U)
539 {
540 /* Get tick */
541 tickstart = HAL_GetTick();
542
543 /* Wait until CSRNE flag is set */
544 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout, tickstart) != HAL_OK)
545 {
546 return HAL_TIMEOUT;
547 }
548
549 (*pData++) = hspdif->Instance->CSR;
550 Size--;
551 }
552
553 /* SPDIFRX ready */
554 hspdif->State = HAL_SPDIFRX_STATE_READY;
555
556 /* Process Unlocked */
557 __HAL_UNLOCK(hspdif);
558
559 return HAL_OK;
560 }
561 else
562 {
563 return HAL_BUSY;
564 }
565 }
566
567 /**
568 * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
569 * @param hspdif: SPDIFRX handle
570 * @param pData: a 32-bit pointer to the Receive data buffer.
571 * @param Size: number of data sample to be received .
572 * @retval HAL status
573 */
574 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
575 {
576 uint32_t tickstart = 0U;
577
578 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
579 {
580 if((pData == NULL) || (Size == 0U))
581 {
582 return HAL_ERROR;
583 }
584
585 /* Process Locked */
586 __HAL_LOCK(hspdif);
587
588 hspdif->pRxBuffPtr = pData;
589 hspdif->RxXferSize = Size;
590 hspdif->RxXferCount = Size;
591
592 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
593
594 /* Check if a receive process is ongoing or not */
595 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
596
597
598 /* Enable the SPDIFRX PE Error Interrupt */
599 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
600
601 /* Enable the SPDIFRX OVR Error Interrupt */
602 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
603
604 /* Process Unlocked */
605 __HAL_UNLOCK(hspdif);
606
607 /* Enable the SPDIFRX RXNE interrupt */
608 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
609
610 if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U))
611 {
612 /* Start synchronization */
613 __HAL_SPDIFRX_SYNC(hspdif);
614
615 /* Get tick */
616 tickstart = HAL_GetTick();
617
618 /* Wait until SYNCD flag is set */
619 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE, tickstart) != HAL_OK)
620 {
621 return HAL_TIMEOUT;
622 }
623
624 /* Start reception */
625 __HAL_SPDIFRX_RCV(hspdif);
626 }
627
628 return HAL_OK;
629 }
630 else
631 {
632 return HAL_BUSY;
633 }
634 }
635
636 /**
637 * @brief Receive an amount of data (Control Flow) with Interrupt
638 * @param hspdif: SPDIFRX handle
639 * @param pData: a 32-bit pointer to the Receive data buffer.
640 * @param Size: number of data sample (Control Flow) to be received :
641 * @retval HAL status
642 */
643 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
644 {
645 uint32_t tickstart = 0U;
646
647 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
648 {
649 if((pData == NULL ) || (Size == 0U))
650 {
651 return HAL_ERROR;
652 }
653
654 /* Process Locked */
655 __HAL_LOCK(hspdif);
656
657 hspdif->pCsBuffPtr = pData;
658 hspdif->CsXferSize = Size;
659 hspdif->CsXferCount = Size;
660
661 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
662
663 /* Check if a receive process is ongoing or not */
664 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
665
666
667 /* Enable the SPDIFRX PE Error Interrupt */
668 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
669
670 /* Enable the SPDIFRX OVR Error Interrupt */
671 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
672
673 /* Process Unlocked */
674 __HAL_UNLOCK(hspdif);
675
676 /* Enable the SPDIFRX CSRNE interrupt */
677 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
678
679 if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U))
680 {
681 /* Start synchronization */
682 __HAL_SPDIFRX_SYNC(hspdif);
683
684 /* Get tick */
685 tickstart = HAL_GetTick();
686
687 /* Wait until SYNCD flag is set */
688 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE, tickstart) != HAL_OK)
689 {
690 return HAL_TIMEOUT;
691 }
692
693 /* Start reception */
694 __HAL_SPDIFRX_RCV(hspdif);
695 }
696
697 return HAL_OK;
698 }
699 else
700 {
701 return HAL_BUSY;
702 }
703 }
704
705 /**
706 * @brief Receive an amount of data (Data Flow) mode with DMA
707 * @param hspdif: SPDIFRX handle
708 * @param pData: a 32-bit pointer to the Receive data buffer.
709 * @param Size: number of data sample to be received :
710 * @retval HAL status
711 */
712 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
713 {
714 uint32_t tickstart = 0U;
715
716 if((pData == NULL) || (Size == 0U))
717 {
718 return HAL_ERROR;
719 }
720
721 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
722 {
723 hspdif->pRxBuffPtr = pData;
724 hspdif->RxXferSize = Size;
725 hspdif->RxXferCount = Size;
726
727 /* Process Locked */
728 __HAL_LOCK(hspdif);
729
730 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
731 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
732
733 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
734 hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
735
736 /* Set the SPDIFRX Rx DMA transfer complete callback */
737 hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
738
739 /* Set the DMA error callback */
740 hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
741
742 /* Enable the DMA request */
743 HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
744
745 /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
746 hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
747
748 if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U))
749 {
750 /* Start synchronization */
751 __HAL_SPDIFRX_SYNC(hspdif);
752
753 /* Get tick */
754 tickstart = HAL_GetTick();
755
756 /* Wait until SYNCD flag is set */
757 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE, tickstart) != HAL_OK)
758 {
759 return HAL_TIMEOUT;
760 }
761
762 /* Start reception */
763 __HAL_SPDIFRX_RCV(hspdif);
764 }
765
766 /* Process Unlocked */
767 __HAL_UNLOCK(hspdif);
768
769 return HAL_OK;
770 }
771 else
772 {
773 return HAL_BUSY;
774 }
775 }
776
777 /**
778 * @brief Receive an amount of data (Control Flow) with DMA
779 * @param hspdif: SPDIFRX handle
780 * @param pData: a 32-bit pointer to the Receive data buffer.
781 * @param Size: number of data (Control Flow) sample to be received :
782 * @retval HAL status
783 */
784 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
785 {
786 uint32_t tickstart = 0U;
787
788 if((pData == NULL) || (Size == 0U))
789 {
790 return HAL_ERROR;
791 }
792
793 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
794 {
795 hspdif->pCsBuffPtr = pData;
796 hspdif->CsXferSize = Size;
797 hspdif->CsXferCount = Size;
798
799 /* Process Locked */
800 __HAL_LOCK(hspdif);
801
802 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
803 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
804
805 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
806 hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
807
808 /* Set the SPDIFRX Rx DMA transfer complete callback */
809 hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
810
811 /* Set the DMA error callback */
812 hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
813
814 /* Enable the DMA request */
815 HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
816
817 /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
818 hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
819
820 if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U))
821 {
822 /* Start synchronization */
823 __HAL_SPDIFRX_SYNC(hspdif);
824
825 /* Get tick */
826 tickstart = HAL_GetTick();
827
828 /* Wait until SYNCD flag is set */
829 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE, tickstart) != HAL_OK)
830 {
831 return HAL_TIMEOUT;
832 }
833
834 /* Start reception */
835 __HAL_SPDIFRX_RCV(hspdif);
836 }
837
838 /* Process Unlocked */
839 __HAL_UNLOCK(hspdif);
840
841 return HAL_OK;
842 }
843 else
844 {
845 return HAL_BUSY;
846 }
847 }
848
849 /**
850 * @brief stop the audio stream receive from the Media.
851 * @param hspdif: SPDIFRX handle
852 * @retval None
853 */
854 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
855 {
856 /* Process Locked */
857 __HAL_LOCK(hspdif);
858
859 /* Disable the SPDIFRX DMA requests */
860 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
861 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
862
863 /* Disable the SPDIFRX DMA channel */
864 __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
865 __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
866
867 /* Disable SPDIFRX peripheral */
868 __HAL_SPDIFRX_IDLE(hspdif);
869
870 hspdif->State = HAL_SPDIFRX_STATE_READY;
871
872 /* Process Unlocked */
873 __HAL_UNLOCK(hspdif);
874
875 return HAL_OK;
876 }
877
878 /**
879 * @brief This function handles SPDIFRX interrupt request.
880 * @param hspdif: SPDIFRX handle
881 * @retval HAL status
882 */
883 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
884 {
885 /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
886 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET))
887 {
888 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
889 SPDIFRX_ReceiveDataFlow_IT(hspdif);
890 }
891
892 /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
893 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET))
894 {
895 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
896 SPDIFRX_ReceiveControlFlow_IT(hspdif);
897 }
898
899 /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
900 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET))
901 {
902 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR);
903
904 /* Change the SPDIFRX error code */
905 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
906
907 /* the transfer is not stopped */
908 HAL_SPDIFRX_ErrorCallback(hspdif);
909 }
910
911 /* SPDIFRX Parity error interrupt occurred ---------------------------------*/
912 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET))
913 {
914 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR);
915
916 /* Change the SPDIFRX error code */
917 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
918
919 /* the transfer is not stopped */
920 HAL_SPDIFRX_ErrorCallback(hspdif);
921 }
922 }
923
924 /**
925 * @brief Rx Transfer (Data flow) half completed callbacks
926 * @param hspdif: SPDIFRX handle
927 * @retval None
928 */
929 __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
930 {
931 /* Prevent unused argument(s) compilation warning */
932 UNUSED(hspdif);
933
934 /* NOTE : This function Should not be modified, when the callback is needed,
935 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
936 */
937 }
938
939 /**
940 * @brief Rx Transfer (Data flow) completed callbacks
941 * @param hspdif: SPDIFRX handle
942 * @retval None
943 */
944 __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
945 {
946 /* Prevent unused argument(s) compilation warning */
947 UNUSED(hspdif);
948
949 /* NOTE : This function Should not be modified, when the callback is needed,
950 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
951 */
952 }
953
954 /**
955 * @brief Rx (Control flow) Transfer half completed callbacks
956 * @param hspdif: SPDIFRX handle
957 * @retval None
958 */
959 __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
960 {
961 /* Prevent unused argument(s) compilation warning */
962 UNUSED(hspdif);
963
964 /* NOTE : This function Should not be modified, when the callback is needed,
965 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
966 */
967 }
968
969 /**
970 * @brief Rx Transfer (Control flow) completed callbacks
971 * @param hspdif: SPDIFRX handle
972 * @retval None
973 */
974 __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
975 {
976 /* Prevent unused argument(s) compilation warning */
977 UNUSED(hspdif);
978
979 /* NOTE : This function Should not be modified, when the callback is needed,
980 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
981 */
982 }
983
984 /**
985 * @brief SPDIFRX error callbacks
986 * @param hspdif: SPDIFRX handle
987 * @retval None
988 */
989 __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
990 {
991 /* Prevent unused argument(s) compilation warning */
992 UNUSED(hspdif);
993
994 /* NOTE : This function Should not be modified, when the callback is needed,
995 the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
996 */
997 }
998
999 /**
1000 * @}
1001 */
1002
1003 /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
1004 * @brief Peripheral State functions
1005 *
1006 @verbatim
1007 ===============================================================================
1008 ##### Peripheral State and Errors functions #####
1009 ===============================================================================
1010 [..]
1011 This subsection permit to get in run-time the status of the peripheral
1012 and the data flow.
1013
1014 @endverbatim
1015 * @{
1016 */
1017
1018 /**
1019 * @brief Return the SPDIFRX state
1020 * @param hspdif : SPDIFRX handle
1021 * @retval HAL state
1022 */
1023 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
1024 {
1025 return hspdif->State;
1026 }
1027
1028 /**
1029 * @brief Return the SPDIFRX error code
1030 * @param hspdif : SPDIFRX handle
1031 * @retval SPDIFRX Error Code
1032 */
1033 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
1034 {
1035 return hspdif->ErrorCode;
1036 }
1037
1038 /**
1039 * @}
1040 */
1041
1042 /**
1043 * @brief DMA SPDIFRX receive process (Data flow) complete callback
1044 * @param hdma : DMA handle
1045 * @retval None
1046 */
1047 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
1048 {
1049 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1050
1051 /* Disable Rx DMA Request */
1052 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
1053 {
1054 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1055 hspdif->RxXferCount = 0;
1056 hspdif->State = HAL_SPDIFRX_STATE_READY;
1057 }
1058 HAL_SPDIFRX_RxCpltCallback(hspdif);
1059 }
1060
1061 /**
1062 * @brief DMA SPDIFRX receive process (Data flow) half complete callback
1063 * @param hdma : DMA handle
1064 * @retval None
1065 */
1066 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1067 {
1068 SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1069
1070 HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
1071 }
1072
1073
1074 /**
1075 * @brief DMA SPDIFRX receive process (Control flow) complete callback
1076 * @param hdma : DMA handle
1077 * @retval None
1078 */
1079 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
1080 {
1081 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1082
1083 /* Disable Cb DMA Request */
1084 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1085 hspdif->CsXferCount = 0;
1086
1087 hspdif->State = HAL_SPDIFRX_STATE_READY;
1088 HAL_SPDIFRX_CxCpltCallback(hspdif);
1089 }
1090
1091 /**
1092 * @brief DMA SPDIFRX receive process (Control flow) half complete callback
1093 * @param hdma : DMA handle
1094 * @retval None
1095 */
1096 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
1097 {
1098 SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1099
1100 HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
1101 }
1102
1103 /**
1104 * @brief DMA SPDIFRX communication error callback
1105 * @param hdma : DMA handle
1106 * @retval None
1107 */
1108 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
1109 {
1110 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1111
1112 /* Disable Rx and Cb DMA Request */
1113 hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
1114 hspdif->RxXferCount = 0;
1115
1116 hspdif->State= HAL_SPDIFRX_STATE_READY;
1117
1118 /* Set the error code and execute error callback*/
1119 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
1120 HAL_SPDIFRX_ErrorCallback(hspdif);
1121 }
1122
1123 /**
1124 * @brief Receive an amount of data (Data Flow) with Interrupt
1125 * @param hspdif: SPDIFRX handle
1126 * @retval None
1127 */
1128 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1129 {
1130 /* Receive data */
1131 (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
1132 hspdif->RxXferCount--;
1133
1134 if(hspdif->RxXferCount == 0)
1135 {
1136 /* Disable RXNE/PE and OVR interrupts */
1137 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
1138
1139 hspdif->State = HAL_SPDIFRX_STATE_READY;
1140
1141 /* Process Unlocked */
1142 __HAL_UNLOCK(hspdif);
1143
1144 HAL_SPDIFRX_RxCpltCallback(hspdif);
1145 }
1146 }
1147
1148 /**
1149 * @brief Receive an amount of data (Control Flow) with Interrupt
1150 * @param hspdif: SPDIFRX handle
1151 * @retval None
1152 */
1153 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1154 {
1155 /* Receive data */
1156 (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
1157 hspdif->CsXferCount--;
1158
1159 if(hspdif->CsXferCount == 0)
1160 {
1161 /* Disable CSRNE interrupt */
1162 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1163
1164 hspdif->State = HAL_SPDIFRX_STATE_READY;
1165
1166 /* Process Unlocked */
1167 __HAL_UNLOCK(hspdif);
1168
1169 HAL_SPDIFRX_CxCpltCallback(hspdif);
1170 }
1171 }
1172
1173 /**
1174 * @brief This function handles SPDIFRX Communication Timeout.
1175 * @param hspdif: SPDIFRX handle
1176 * @param Flag: Flag checked
1177 * @param Status: Value of the flag expected
1178 * @param Timeout: Duration of the timeout
1179 * @param tickstart: Tick start value
1180 * @retval HAL status
1181 */
1182 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t tickstart)
1183 {
1184 /* Wait until flag is set */
1185 if(Status == RESET)
1186 {
1187 while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
1188 {
1189 /* Check for the Timeout */
1190 if(Timeout != HAL_MAX_DELAY)
1191 {
1192 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
1193 {
1194 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1195 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1196 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1197 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1198 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1199 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1200 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1201 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1202
1203 hspdif->State= HAL_SPDIFRX_STATE_READY;
1204
1205 /* Process Unlocked */
1206 __HAL_UNLOCK(hspdif);
1207
1208 return HAL_TIMEOUT;
1209 }
1210 }
1211 }
1212 }
1213 else
1214 {
1215 while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
1216 {
1217 /* Check for the Timeout */
1218 if(Timeout != HAL_MAX_DELAY)
1219 {
1220 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
1221 {
1222 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1223 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1224 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1225 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1226 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1227 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1228 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1229 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1230
1231 hspdif->State= HAL_SPDIFRX_STATE_READY;
1232
1233 /* Process Unlocked */
1234 __HAL_UNLOCK(hspdif);
1235
1236 return HAL_TIMEOUT;
1237 }
1238 }
1239 }
1240 }
1241 return HAL_OK;
1242 }
1243
1244 /**
1245 * @}
1246 */
1247
1248 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
1249 /**
1250 * @}
1251 */
1252
1253 /**
1254 * @}
1255 */
1256
1257 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/