2 ******************************************************************************
3 * @file stm32f7xx_hal_spi.c
4 * @author MCD Application Team
7 * @brief SPI HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Serial Peripheral Interface (SPI) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State functions
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
20 The SPI HAL driver can be used as follows:
22 (#) Declare a SPI_HandleTypeDef handle structure, for example:
23 SPI_HandleTypeDef hspi;
25 (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API:
26 (##) Enable the SPIx interface clock
27 (##) SPI pins configuration
28 (+++) Enable the clock for the SPI GPIOs
29 (+++) Configure these SPI pins as alternate function push-pull
30 (##) NVIC configuration if you need to use interrupt process
31 (+++) Configure the SPIx interrupt priority
32 (+++) Enable the NVIC SPI IRQ handle
33 (##) DMA Configuration if you need to use DMA process
34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
35 (+++) Enable the DMAx clock
36 (+++) Configure the DMA handle parameters
37 (+++) Configure the DMA Tx or Rx channel
38 (+++) Associate the initialized hdma_tx handle to the hspi DMA Tx or Rx handle
39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx channel
41 (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
42 management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
44 (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
45 (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
46 by calling the customized HAL_SPI_MspInit() API.
48 Circular mode restriction:
49 (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
50 (##) Master 2Lines RxOnly
52 (#) The CRC feature is not managed when the DMA circular mode is enabled
53 (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
54 the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
57 ******************************************************************************
60 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
62 * Redistribution and use in source and binary forms, with or without modification,
63 * are permitted provided that the following conditions are met:
64 * 1. Redistributions of source code must retain the above copyright notice,
65 * this list of conditions and the following disclaimer.
66 * 2. Redistributions in binary form must reproduce the above copyright notice,
67 * this list of conditions and the following disclaimer in the documentation
68 * and/or other materials provided with the distribution.
69 * 3. Neither the name of STMicroelectronics nor the names of its contributors
70 * may be used to endorse or promote products derived from this software
71 * without specific prior written permission.
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
76 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
77 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
78 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
79 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
80 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
81 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
82 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84 ******************************************************************************
87 /* Includes ------------------------------------------------------------------*/
88 #include "stm32f7xx_hal.h"
90 /** @addtogroup STM32F7xx_HAL_Driver
95 * @brief SPI HAL module driver
98 #ifdef HAL_SPI_MODULE_ENABLED
100 /* Private typedef -----------------------------------------------------------*/
101 /* Private defines -----------------------------------------------------------*/
102 /** @defgroup SPI_Private_Constants SPI Private Constants
105 #define SPI_DEFAULT_TIMEOUT 50
110 /* Private macros ------------------------------------------------------------*/
111 /* Private variables ---------------------------------------------------------*/
112 /* Private function prototypes -----------------------------------------------*/
113 /** @defgroup SPI_Private_Functions SPI Private Functions
116 static void SPI_DMATransmitCplt(DMA_HandleTypeDef
*hdma
);
117 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef
*hdma
);
118 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef
*hdma
);
119 static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef
*hdma
);
120 static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef
*hdma
);
121 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef
*hdma
);
122 static void SPI_DMAError(DMA_HandleTypeDef
*hdma
);
123 static void SPI_DMAAbortOnError(DMA_HandleTypeDef
*hdma
);
124 static HAL_StatusTypeDef
SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef
*hspi
, uint32_t Flag
, uint32_t State
, uint32_t Timeout
);
125 static HAL_StatusTypeDef
SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef
*hspi
, uint32_t Fifo
, uint32_t State
, uint32_t Timeout
);
126 static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef
*hspi
);
127 static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef
*hspi
);
128 static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef
*hspi
);
129 #if (USE_SPI_CRC != 0U)
130 static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef
*hspi
);
131 static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef
*hspi
);
132 static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef
*hspi
);
133 static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef
*hspi
);
135 static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef
*hspi
);
136 static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef
*hspi
);
137 static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef
*hspi
);
138 static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef
*hspi
);
139 static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef
*hspi
);
140 static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef
*hspi
);
141 static void SPI_CloseRx_ISR(SPI_HandleTypeDef
*hspi
);
142 static void SPI_CloseTx_ISR(SPI_HandleTypeDef
*hspi
);
143 static HAL_StatusTypeDef
SPI_EndRxTransaction(SPI_HandleTypeDef
*hspi
, uint32_t Timeout
);
144 static HAL_StatusTypeDef
SPI_EndRxTxTransaction(SPI_HandleTypeDef
*hspi
, uint32_t Timeout
);
149 /* Exported functions ---------------------------------------------------------*/
151 /** @defgroup SPI_Exported_Functions SPI Exported Functions
155 /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
156 * @brief Initialization and Configuration functions
159 ===============================================================================
160 ##### Initialization and de-initialization functions #####
161 ===============================================================================
162 [..] This subsection provides a set of functions allowing to initialize and
163 de-initialize the SPIx peripheral:
165 (+) User must implement HAL_SPI_MspInit() function in which he configures
166 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
168 (+) Call the function HAL_SPI_Init() to configure the selected device with
169 the selected configuration:
173 (++) Clock Polarity and Phase
175 (++) BaudRate Prescaler
179 (++) CRC Polynomial if CRC enabled
180 (++) CRC Length, used only with Data8 and Data16
181 (++) FIFO reception threshold
183 (+) Call the function HAL_SPI_DeInit() to restore the default configuration
184 of the selected SPIx peripheral.
191 * @brief Initialize the SPI according to the specified parameters
192 * in the SPI_InitTypeDef and initialize the associated handle.
193 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
194 * the configuration information for SPI module.
197 HAL_StatusTypeDef
HAL_SPI_Init(SPI_HandleTypeDef
*hspi
)
201 /* Check the SPI handle allocation */
207 /* Check the parameters */
208 assert_param(IS_SPI_ALL_INSTANCE(hspi
->Instance
));
209 assert_param(IS_SPI_MODE(hspi
->Init
.Mode
));
210 assert_param(IS_SPI_DIRECTION(hspi
->Init
.Direction
));
211 assert_param(IS_SPI_DATASIZE(hspi
->Init
.DataSize
));
212 assert_param(IS_SPI_CPOL(hspi
->Init
.CLKPolarity
));
213 assert_param(IS_SPI_CPHA(hspi
->Init
.CLKPhase
));
214 assert_param(IS_SPI_NSS(hspi
->Init
.NSS
));
215 assert_param(IS_SPI_NSSP(hspi
->Init
.NSSPMode
));
216 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi
->Init
.BaudRatePrescaler
));
217 assert_param(IS_SPI_FIRST_BIT(hspi
->Init
.FirstBit
));
218 assert_param(IS_SPI_TIMODE(hspi
->Init
.TIMode
));
219 #if (USE_SPI_CRC != 0U)
220 assert_param(IS_SPI_CRC_CALCULATION(hspi
->Init
.CRCCalculation
));
221 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
223 assert_param(IS_SPI_CRC_POLYNOMIAL(hspi
->Init
.CRCPolynomial
));
224 assert_param(IS_SPI_CRC_LENGTH(hspi
->Init
.CRCLength
));
226 /* Align the CRC Length on the data size */
227 if( hspi
->Init
.CRCLength
== SPI_CRC_LENGTH_DATASIZE
)
229 /* CRC Length aligned on the data size : value set by default */
230 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
232 hspi
->Init
.CRCLength
= SPI_CRC_LENGTH_16BIT
;
236 hspi
->Init
.CRCLength
= SPI_CRC_LENGTH_8BIT
;
241 if(hspi
->State
== HAL_SPI_STATE_RESET
)
243 /* Allocate lock resource and initialize it */
244 hspi
->Lock
= HAL_UNLOCKED
;
246 /* Init the low level hardware : GPIO, CLOCK, NVIC... */
247 HAL_SPI_MspInit(hspi
);
250 hspi
->State
= HAL_SPI_STATE_BUSY
;
252 /* Disable the selected SPI peripheral */
253 __HAL_SPI_DISABLE(hspi
);
255 /* Align by default the rs fifo threshold on the data size */
256 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
258 frxth
= SPI_RXFIFO_THRESHOLD_HF
;
262 frxth
= SPI_RXFIFO_THRESHOLD_QF
;
265 /* CRC calculation is valid only for 16Bit and 8 Bit */
266 if(( hspi
->Init
.DataSize
!= SPI_DATASIZE_16BIT
) && ( hspi
->Init
.DataSize
!= SPI_DATASIZE_8BIT
))
268 /* CRC must be disabled */
269 hspi
->Init
.CRCCalculation
= SPI_CRCCALCULATION_DISABLE
;
272 /*---------------------------- SPIx CR1 & CR2 Configuration ------------------------*/
273 /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
274 Communication speed, First bit, CRC calculation state, CRC Length */
275 hspi
->Instance
->CR1
= (hspi
->Init
.Mode
| hspi
->Init
.Direction
|
276 hspi
->Init
.CLKPolarity
| hspi
->Init
.CLKPhase
| (hspi
->Init
.NSS
& SPI_CR1_SSM
) |
277 hspi
->Init
.BaudRatePrescaler
| hspi
->Init
.FirstBit
| hspi
->Init
.CRCCalculation
);
279 if( hspi
->Init
.CRCLength
== SPI_CRC_LENGTH_16BIT
)
281 hspi
->Instance
->CR1
|= SPI_CR1_CRCL
;
284 /* Configure : NSS management */
285 /* Configure : Rx Fifo Threshold */
286 hspi
->Instance
->CR2
= (((hspi
->Init
.NSS
>> 16) & SPI_CR2_SSOE
) | hspi
->Init
.TIMode
| hspi
->Init
.NSSPMode
|
287 hspi
->Init
.DataSize
) | frxth
;
289 #if (USE_SPI_CRC != 0U)
290 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
291 /* Configure : CRC Polynomial */
292 WRITE_REG(hspi
->Instance
->CRCPR
, hspi
->Init
.CRCPolynomial
);
295 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
296 hspi
->State
= HAL_SPI_STATE_READY
;
302 * @brief DeInitialize the SPI peripheral.
303 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
304 * the configuration information for SPI module.
307 HAL_StatusTypeDef
HAL_SPI_DeInit(SPI_HandleTypeDef
*hspi
)
309 /* Check the SPI handle allocation */
315 /* Check the parameters */
316 assert_param(IS_SPI_ALL_INSTANCE(hspi
->Instance
));
318 hspi
->State
= HAL_SPI_STATE_BUSY
;
320 /* Disable the SPI Peripheral Clock */
321 __HAL_SPI_DISABLE(hspi
);
323 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
324 HAL_SPI_MspDeInit(hspi
);
326 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
327 hspi
->State
= HAL_SPI_STATE_RESET
;
335 * @brief SPI MSP Init
336 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
337 * the configuration information for SPI module.
340 __weak
void HAL_SPI_MspInit(SPI_HandleTypeDef
*hspi
)
342 /* Prevent unused argument(s) compilation warning */
345 /* NOTE : This function should not be modified, when the callback is needed,
346 the HAL_SPI_MspInit should be implemented in the user file
351 * @brief SPI MSP DeInit
352 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
353 * the configuration information for SPI module.
356 __weak
void HAL_SPI_MspDeInit(SPI_HandleTypeDef
*hspi
)
358 /* Prevent unused argument(s) compilation warning */
361 /* NOTE : This function should not be modified, when the callback is needed,
362 the HAL_SPI_MspDeInit should be implemented in the user file
370 /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
371 * @brief Data transfers functions
374 ==============================================================================
375 ##### IO operation functions #####
376 ===============================================================================
378 This subsection provides a set of functions allowing to manage the SPI
381 [..] The SPI supports master and slave mode :
383 (#) There are two modes of transfer:
384 (++) Blocking mode: The communication is performed in polling mode.
385 The HAL status of all data processing is returned by the same function
386 after finishing transfer.
387 (++) No-Blocking mode: The communication is performed using Interrupts
388 or DMA, These APIs return the HAL status.
389 The end of the data processing will be indicated through the
390 dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
392 The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
393 will be executed respectively at the end of the transmit or Receive process
394 The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
396 (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
397 exist for 1Line (simplex) and 2Lines (full duplex) modes.
404 * @brief Transmit an amount of data in blocking mode.
405 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
406 * the configuration information for SPI module.
407 * @param pData: pointer to data buffer
408 * @param Size: amount of data to be sent
409 * @param Timeout: Timeout duration
412 HAL_StatusTypeDef
HAL_SPI_Transmit(SPI_HandleTypeDef
*hspi
, uint8_t *pData
, uint16_t Size
, uint32_t Timeout
)
414 uint32_t tickstart
= HAL_GetTick();
415 HAL_StatusTypeDef errorcode
= HAL_OK
;
417 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi
->Init
.Direction
));
422 if(hspi
->State
!= HAL_SPI_STATE_READY
)
424 errorcode
= HAL_BUSY
;
428 if((pData
== NULL
) || (Size
== 0))
430 errorcode
= HAL_ERROR
;
434 /* Set the transaction information */
435 hspi
->State
= HAL_SPI_STATE_BUSY_TX
;
436 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
437 hspi
->pTxBuffPtr
= pData
;
438 hspi
->TxXferSize
= Size
;
439 hspi
->TxXferCount
= Size
;
440 hspi
->pRxBuffPtr
= (uint8_t *)NULL
;
441 hspi
->RxXferSize
= 0;
442 hspi
->RxXferCount
= 0;
444 /* Configure communication direction : 1Line */
445 if(hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)
450 #if (USE_SPI_CRC != 0U)
451 /* Reset CRC Calculation */
452 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
458 /* Check if the SPI is already enabled */
459 if((hspi
->Instance
->CR1
& SPI_CR1_SPE
) != SPI_CR1_SPE
)
461 /* Enable SPI peripheral */
462 __HAL_SPI_ENABLE(hspi
);
465 /* Transmit data in 16 Bit mode */
466 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
468 /* Transmit data in 16 Bit mode */
469 while (hspi
->TxXferCount
> 0)
471 /* Wait until TXE flag is set to send data */
472 if((hspi
->Instance
->SR
& SPI_FLAG_TXE
) == SPI_FLAG_TXE
)
474 hspi
->Instance
->DR
= *((uint16_t *)hspi
->pTxBuffPtr
);
475 hspi
->pTxBuffPtr
+= sizeof(uint16_t);
480 /* Timeout management */
481 if((Timeout
== 0) || ((Timeout
!= HAL_MAX_DELAY
) && ((HAL_GetTick()-tickstart
) >= Timeout
)))
483 errorcode
= HAL_TIMEOUT
;
489 /* Transmit data in 8 Bit mode */
492 while (hspi
->TxXferCount
> 0)
494 /* Wait until TXE flag is set to send data */
495 if((hspi
->Instance
->SR
& SPI_FLAG_TXE
) == SPI_FLAG_TXE
)
497 if(hspi
->TxXferCount
> 1)
499 /* write on the data register in packing mode */
500 hspi
->Instance
->DR
= *((uint16_t*)hspi
->pTxBuffPtr
);
501 hspi
->pTxBuffPtr
+= sizeof(uint16_t);
502 hspi
->TxXferCount
-= 2;
506 *((__IO
uint8_t*)&hspi
->Instance
->DR
) = (*hspi
->pTxBuffPtr
++);
512 /* Timeout management */
513 if((Timeout
== 0) || ((Timeout
!= HAL_MAX_DELAY
) && ((HAL_GetTick()-tickstart
) >= Timeout
)))
515 errorcode
= HAL_TIMEOUT
;
522 #if (USE_SPI_CRC != 0U)
523 /* Enable CRC Transmission */
524 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
526 hspi
->Instance
->CR1
|= SPI_CR1_CRCNEXT
;
530 /* Check the end of the transaction */
531 if(SPI_EndRxTxTransaction(hspi
,Timeout
) != HAL_OK
)
533 hspi
->ErrorCode
= HAL_SPI_ERROR_FLAG
;
536 /* Clear overrun flag in 2 Lines communication mode because received is not read */
537 if(hspi
->Init
.Direction
== SPI_DIRECTION_2LINES
)
539 __HAL_SPI_CLEAR_OVRFLAG(hspi
);
542 if(hspi
->ErrorCode
!= HAL_SPI_ERROR_NONE
)
544 errorcode
= HAL_ERROR
;
548 hspi
->State
= HAL_SPI_STATE_READY
;
549 /* Process Unlocked */
555 * @brief Receive an amount of data in blocking mode.
556 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
557 * the configuration information for SPI module.
558 * @param pData: pointer to data buffer
559 * @param Size: amount of data to be received
560 * @param Timeout: Timeout duration
563 HAL_StatusTypeDef
HAL_SPI_Receive(SPI_HandleTypeDef
*hspi
, uint8_t *pData
, uint16_t Size
, uint32_t Timeout
)
565 #if (USE_SPI_CRC != 0U)
566 __IO
uint16_t tmpreg
;
568 uint32_t tickstart
= HAL_GetTick();
569 HAL_StatusTypeDef errorcode
= HAL_OK
;
571 if((hspi
->Init
.Mode
== SPI_MODE_MASTER
) && (hspi
->Init
.Direction
== SPI_DIRECTION_2LINES
))
573 /* the receive process is not supported in 2Lines direction master mode */
574 /* in this case we call the TransmitReceive process */
576 return HAL_SPI_TransmitReceive(hspi
,pData
,pData
,Size
,Timeout
);
582 if(hspi
->State
!= HAL_SPI_STATE_READY
)
584 errorcode
= HAL_BUSY
;
588 if((pData
== NULL
) || (Size
== 0))
590 errorcode
= HAL_ERROR
;
594 hspi
->State
= HAL_SPI_STATE_BUSY_RX
;
595 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
596 hspi
->pRxBuffPtr
= pData
;
597 hspi
->RxXferSize
= Size
;
598 hspi
->RxXferCount
= Size
;
599 hspi
->pTxBuffPtr
= (uint8_t *)NULL
;
600 hspi
->TxXferSize
= 0;
601 hspi
->TxXferCount
= 0;
603 #if (USE_SPI_CRC != 0U)
604 /* Reset CRC Calculation */
605 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
608 /* this is done to handle the CRCNEXT before the latest data */
613 /* Set the Rx Fido threshold */
614 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
616 /* set fiforxthreshold according the reception data length: 16bit */
617 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
621 /* set fiforxthreshold according the reception data length: 8bit */
622 SET_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
625 /* Configure communication direction 1Line and enabled SPI if needed */
626 if(hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)
631 /* Check if the SPI is already enabled */
632 if((hspi
->Instance
->CR1
& SPI_CR1_SPE
) != SPI_CR1_SPE
)
634 /* Enable SPI peripheral */
635 __HAL_SPI_ENABLE(hspi
);
638 /* Receive data in 8 Bit mode */
639 if(hspi
->Init
.DataSize
<= SPI_DATASIZE_8BIT
)
642 while(hspi
->RxXferCount
> 0)
644 /* Check the RXNE flag */
645 if((hspi
->Instance
->SR
& SPI_FLAG_RXNE
) == SPI_FLAG_RXNE
)
647 /* read the received data */
648 (*hspi
->pRxBuffPtr
++)= *(__IO
uint8_t *)&hspi
->Instance
->DR
;
653 /* Timeout management */
654 if((Timeout
== 0) || ((Timeout
!= HAL_MAX_DELAY
) && ((HAL_GetTick()-tickstart
) >= Timeout
)))
656 errorcode
= HAL_TIMEOUT
;
665 while(hspi
->RxXferCount
> 0)
667 /* Check the RXNE flag */
668 if((hspi
->Instance
->SR
& SPI_FLAG_RXNE
) == SPI_FLAG_RXNE
)
670 *((uint16_t*)hspi
->pRxBuffPtr
) = hspi
->Instance
->DR
;
671 hspi
->pRxBuffPtr
+= sizeof(uint16_t);
676 /* Timeout management */
677 if((Timeout
== 0) || ((Timeout
!= HAL_MAX_DELAY
) && ((HAL_GetTick()-tickstart
) >= Timeout
)))
679 errorcode
= HAL_TIMEOUT
;
686 #if (USE_SPI_CRC != 0U)
687 /* Handle the CRC Transmission */
688 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
690 /* freeze the CRC before the latest data */
691 hspi
->Instance
->CR1
|= SPI_CR1_CRCNEXT
;
693 /* Read the latest data */
694 if(SPI_WaitFlagStateUntilTimeout(hspi
, SPI_FLAG_RXNE
, SPI_FLAG_RXNE
, Timeout
) != HAL_OK
)
696 /* the latest data has not been received */
697 errorcode
= HAL_TIMEOUT
;
701 /* Receive last data in 16 Bit mode */
702 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
704 *((uint16_t*)hspi
->pRxBuffPtr
) = hspi
->Instance
->DR
;
706 /* Receive last data in 8 Bit mode */
709 *hspi
->pRxBuffPtr
= *(__IO
uint8_t *)&hspi
->Instance
->DR
;
712 /* Wait until TXE flag */
713 if(SPI_WaitFlagStateUntilTimeout(hspi
, SPI_FLAG_RXNE
, SPI_FLAG_RXNE
, Timeout
) != HAL_OK
)
716 hspi
->ErrorCode
= HAL_SPI_ERROR_CRC
;
717 errorcode
= HAL_TIMEOUT
;
721 if(hspi
->Init
.DataSize
== SPI_DATASIZE_16BIT
)
723 tmpreg
= hspi
->Instance
->DR
;
724 UNUSED(tmpreg
); /* To avoid GCC warning */
728 tmpreg
= *(__IO
uint8_t *)&hspi
->Instance
->DR
;
729 UNUSED(tmpreg
); /* To avoid GCC warning */
731 if((hspi
->Init
.DataSize
== SPI_DATASIZE_8BIT
) && (hspi
->Init
.CRCLength
== SPI_CRC_LENGTH_16BIT
))
733 if(SPI_WaitFlagStateUntilTimeout(hspi
, SPI_FLAG_RXNE
, SPI_FLAG_RXNE
, Timeout
) != HAL_OK
)
735 /* Error on the CRC reception */
736 hspi
->ErrorCode
= HAL_SPI_ERROR_CRC
;
737 errorcode
= HAL_TIMEOUT
;
740 tmpreg
= *(__IO
uint8_t *)&hspi
->Instance
->DR
;
741 UNUSED(tmpreg
); /* To avoid GCC warning */
747 /* Check the end of the transaction */
748 if(SPI_EndRxTransaction(hspi
,Timeout
) != HAL_OK
)
750 hspi
->ErrorCode
= HAL_SPI_ERROR_FLAG
;
753 #if (USE_SPI_CRC != 0U)
754 /* Check if CRC error occurred */
755 if(__HAL_SPI_GET_FLAG(hspi
, SPI_FLAG_CRCERR
) != RESET
)
757 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
758 __HAL_SPI_CLEAR_CRCERRFLAG(hspi
);
762 if(hspi
->ErrorCode
!= HAL_SPI_ERROR_NONE
)
764 errorcode
= HAL_ERROR
;
768 hspi
->State
= HAL_SPI_STATE_READY
;
774 * @brief Transmit and Receive an amount of data in blocking mode.
775 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
776 * the configuration information for SPI module.
777 * @param pTxData: pointer to transmission data buffer
778 * @param pRxData: pointer to reception data buffer
779 * @param Size: amount of data to be sent and received
780 * @param Timeout: Timeout duration
783 HAL_StatusTypeDef
HAL_SPI_TransmitReceive(SPI_HandleTypeDef
*hspi
, uint8_t *pTxData
, uint8_t *pRxData
, uint16_t Size
, uint32_t Timeout
)
785 #if (USE_SPI_CRC != 0U)
786 __IO
uint16_t tmpreg
;
788 uint32_t tickstart
= HAL_GetTick();
789 /* Variable used to alternate Rx and Tx during transfer */
790 uint32_t txallowed
= 1U;
792 HAL_StatusTypeDef errorcode
= HAL_OK
;
794 assert_param(IS_SPI_DIRECTION_2LINES(hspi
->Init
.Direction
));
799 if(hspi
->State
!= HAL_SPI_STATE_READY
)
801 errorcode
= HAL_BUSY
;
805 if((pTxData
== NULL
) || (pRxData
== NULL
) || (Size
== 0))
807 errorcode
= HAL_ERROR
;
811 hspi
->State
= HAL_SPI_STATE_BUSY_TX_RX
;
812 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
813 hspi
->pRxBuffPtr
= pRxData
;
814 hspi
->RxXferCount
= Size
;
815 hspi
->RxXferSize
= Size
;
816 hspi
->pTxBuffPtr
= pTxData
;
817 hspi
->TxXferCount
= Size
;
818 hspi
->TxXferSize
= Size
;
820 #if (USE_SPI_CRC != 0U)
821 /* Reset CRC Calculation */
822 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
828 /* Set the Rx Fifo threshold */
829 if((hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
) || (hspi
->RxXferCount
> 1))
831 /* set fiforxthreshold according the reception data length: 16bit */
832 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
836 /* set fiforxthreshold according the reception data length: 8bit */
837 SET_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
840 /* Check if the SPI is already enabled */
841 if((hspi
->Instance
->CR1
&SPI_CR1_SPE
) != SPI_CR1_SPE
)
843 /* Enable SPI peripheral */
844 __HAL_SPI_ENABLE(hspi
);
847 /* Transmit and Receive data in 16 Bit mode */
848 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
850 while ((hspi
->TxXferCount
> 0 ) || (hspi
->RxXferCount
> 0))
853 if(txallowed
&& ((hspi
->TxXferCount
> 0) && ((hspi
->Instance
->SR
& SPI_FLAG_TXE
) == SPI_FLAG_TXE
)))
855 hspi
->Instance
->DR
= *((uint16_t *)hspi
->pTxBuffPtr
);
856 hspi
->pTxBuffPtr
+= sizeof(uint16_t);
858 /* Next Data is a reception (Rx). Tx not allowed */
861 #if (USE_SPI_CRC != 0U)
862 /* Enable CRC Transmission */
863 if((hspi
->TxXferCount
== 0) && (hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
))
865 /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */
866 if(((hspi
->Instance
->CR1
& SPI_CR1_MSTR
) == 0) && ((hspi
->Instance
->CR2
& SPI_CR2_NSSP
) == SPI_CR2_NSSP
))
868 SET_BIT(hspi
->Instance
->CR1
, SPI_CR1_SSM
);
870 SET_BIT(hspi
->Instance
->CR1
, SPI_CR1_CRCNEXT
);
874 /* Check RXNE flag */
875 if((hspi
->RxXferCount
> 0) && ((hspi
->Instance
->SR
& SPI_FLAG_RXNE
) == SPI_FLAG_RXNE
))
877 *((uint16_t *)hspi
->pRxBuffPtr
) = hspi
->Instance
->DR
;
878 hspi
->pRxBuffPtr
+= sizeof(uint16_t);
880 /* Next Data is a reception (Rx). Tx not allowed */
883 if((Timeout
!= HAL_MAX_DELAY
) && ((HAL_GetTick()-tickstart
) >= Timeout
))
885 errorcode
= HAL_TIMEOUT
;
890 /* Transmit and Receive data in 8 Bit mode */
893 while((hspi
->TxXferCount
> 0) || (hspi
->RxXferCount
> 0))
896 if(txallowed
&& ((hspi
->TxXferCount
> 0) && ((hspi
->Instance
->SR
& SPI_FLAG_TXE
) == SPI_FLAG_TXE
)))
898 if(hspi
->TxXferCount
> 1)
900 hspi
->Instance
->DR
= *((uint16_t*)hspi
->pTxBuffPtr
);
901 hspi
->pTxBuffPtr
+= sizeof(uint16_t);
902 hspi
->TxXferCount
-= 2;
906 *(__IO
uint8_t *)&hspi
->Instance
->DR
= (*hspi
->pTxBuffPtr
++);
908 /* Next Data is a reception (Rx). Tx not allowed */
912 #if (USE_SPI_CRC != 0U)
913 /* Enable CRC Transmission */
914 if((hspi
->TxXferCount
== 0) && (hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
))
916 /* Set NSS Soft to received correctly the CRC on slave mode with NSS pulse activated */
917 if(((hspi
->Instance
->CR1
& SPI_CR1_MSTR
) == 0) && ((hspi
->Instance
->CR2
& SPI_CR2_NSSP
) == SPI_CR2_NSSP
))
919 SET_BIT(hspi
->Instance
->CR1
, SPI_CR1_SSM
);
921 SET_BIT(hspi
->Instance
->CR1
, SPI_CR1_CRCNEXT
);
926 /* Wait until RXNE flag is reset */
927 if((hspi
->RxXferCount
> 0) && ((hspi
->Instance
->SR
& SPI_FLAG_RXNE
) == SPI_FLAG_RXNE
))
929 if(hspi
->RxXferCount
> 1)
931 *((uint16_t*)hspi
->pRxBuffPtr
) = hspi
->Instance
->DR
;
932 hspi
->pRxBuffPtr
+= sizeof(uint16_t);
933 hspi
->RxXferCount
-= 2;
934 if(hspi
->RxXferCount
<= 1)
936 /* set fiforxthreshold before to switch on 8 bit data size */
937 SET_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
942 (*hspi
->pRxBuffPtr
++) = *(__IO
uint8_t *)&hspi
->Instance
->DR
;
944 /* Next Data is a Transmission (Tx). Tx is allowed */
948 if((Timeout
!= HAL_MAX_DELAY
) && ((HAL_GetTick()-tickstart
) >= Timeout
))
950 errorcode
= HAL_TIMEOUT
;
956 #if (USE_SPI_CRC != 0U)
957 /* Read CRC from DR to close CRC calculation process */
958 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
960 /* Wait until TXE flag */
961 if(SPI_WaitFlagStateUntilTimeout(hspi
, SPI_FLAG_RXNE
, SPI_FLAG_RXNE
, Timeout
) != HAL_OK
)
963 /* Error on the CRC reception */
964 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
965 errorcode
= HAL_TIMEOUT
;
969 if(hspi
->Init
.DataSize
== SPI_DATASIZE_16BIT
)
971 tmpreg
= hspi
->Instance
->DR
;
972 UNUSED(tmpreg
); /* To avoid GCC warning */
976 tmpreg
= *(__IO
uint8_t *)&hspi
->Instance
->DR
;
977 UNUSED(tmpreg
); /* To avoid GCC warning */
979 if(hspi
->Init
.CRCLength
== SPI_CRC_LENGTH_16BIT
)
981 if(SPI_WaitFlagStateUntilTimeout(hspi
, SPI_FLAG_RXNE
, SPI_FLAG_RXNE
, Timeout
) != HAL_OK
)
983 /* Error on the CRC reception */
984 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
985 errorcode
= HAL_TIMEOUT
;
988 tmpreg
= *(__IO
uint8_t *)&hspi
->Instance
->DR
;
989 UNUSED(tmpreg
); /* To avoid GCC warning */
994 /* Check if CRC error occurred */
995 if(__HAL_SPI_GET_FLAG(hspi
, SPI_FLAG_CRCERR
) != RESET
)
997 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
999 __HAL_SPI_CLEAR_CRCERRFLAG(hspi
);
1001 errorcode
= HAL_ERROR
;
1005 /* Check the end of the transaction */
1006 if(SPI_EndRxTxTransaction(hspi
,Timeout
) != HAL_OK
)
1008 hspi
->ErrorCode
= HAL_SPI_ERROR_FLAG
;
1011 if(hspi
->ErrorCode
!= HAL_SPI_ERROR_NONE
)
1013 errorcode
= HAL_ERROR
;
1017 hspi
->State
= HAL_SPI_STATE_READY
;
1023 * @brief Transmit an amount of data in non-blocking mode with Interrupt.
1024 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1025 * the configuration information for SPI module.
1026 * @param pData: pointer to data buffer
1027 * @param Size: amount of data to be sent
1028 * @retval HAL status
1030 HAL_StatusTypeDef
HAL_SPI_Transmit_IT(SPI_HandleTypeDef
*hspi
, uint8_t *pData
, uint16_t Size
)
1032 HAL_StatusTypeDef errorcode
= HAL_OK
;
1033 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi
->Init
.Direction
));
1035 /* Process Locked */
1038 if((pData
== NULL
) || (Size
== 0))
1040 errorcode
= HAL_ERROR
;
1044 if(hspi
->State
!= HAL_SPI_STATE_READY
)
1046 errorcode
= HAL_BUSY
;
1050 /* prepare the transfer */
1051 hspi
->State
= HAL_SPI_STATE_BUSY_TX
;
1052 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
1053 hspi
->pTxBuffPtr
= pData
;
1054 hspi
->TxXferSize
= Size
;
1055 hspi
->TxXferCount
= Size
;
1056 hspi
->pRxBuffPtr
= (uint8_t *)NULL
;
1057 hspi
->RxXferSize
= 0;
1058 hspi
->RxXferCount
= 0;
1061 /* Set the function for IT treatment */
1062 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
1064 hspi
->TxISR
= SPI_TxISR_16BIT
;
1068 hspi
->TxISR
= SPI_TxISR_8BIT
;
1071 /* Configure communication direction : 1Line */
1072 if(hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)
1077 #if (USE_SPI_CRC != 0U)
1078 /* Reset CRC Calculation */
1079 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
1081 SPI_RESET_CRC(hspi
);
1085 /* Enable TXE and ERR interrupt */
1086 __HAL_SPI_ENABLE_IT(hspi
,(SPI_IT_TXE
));
1088 /* Check if the SPI is already enabled */
1089 if((hspi
->Instance
->CR1
&SPI_CR1_SPE
) != SPI_CR1_SPE
)
1091 /* Enable SPI peripheral */
1092 __HAL_SPI_ENABLE(hspi
);
1101 * @brief Receive an amount of data in non-blocking mode with Interrupt.
1102 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1103 * the configuration information for SPI module.
1104 * @param pData: pointer to data buffer
1105 * @param Size: amount of data to be sent
1106 * @retval HAL status
1108 HAL_StatusTypeDef
HAL_SPI_Receive_IT(SPI_HandleTypeDef
*hspi
, uint8_t *pData
, uint16_t Size
)
1110 HAL_StatusTypeDef errorcode
= HAL_OK
;
1112 /* Process Locked */
1115 if(hspi
->State
!= HAL_SPI_STATE_READY
)
1117 errorcode
= HAL_BUSY
;
1120 if((pData
== NULL
) || (Size
== 0))
1122 errorcode
= HAL_ERROR
;
1126 /* Configure communication */
1127 hspi
->State
= HAL_SPI_STATE_BUSY_RX
;
1128 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
1129 hspi
->pRxBuffPtr
= pData
;
1130 hspi
->RxXferSize
= Size
;
1131 hspi
->RxXferCount
= Size
;
1132 hspi
->pTxBuffPtr
= (uint8_t *)NULL
;
1133 hspi
->TxXferSize
= 0;
1134 hspi
->TxXferCount
= 0;
1136 if((hspi
->Init
.Mode
== SPI_MODE_MASTER
) && (hspi
->Init
.Direction
== SPI_DIRECTION_2LINES
))
1138 /* Process Unlocked */
1140 /* the receive process is not supported in 2Lines direction master mode */
1141 /* in this we call the TransmitReceive process */
1142 return HAL_SPI_TransmitReceive_IT(hspi
,pData
,pData
,Size
);
1145 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
1148 if((hspi
->Init
.DataSize
<= SPI_DATASIZE_8BIT
) && (hspi
->Init
.CRCLength
== SPI_CRC_LENGTH_16BIT
))
1159 /* check the data size to adapt Rx threshold and the set the function for IT treatment */
1160 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
1162 /* set fiforxthresold according the reception data length: 16 bit */
1163 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
1164 hspi
->RxISR
= SPI_RxISR_16BIT
;
1168 /* set fiforxthresold according the reception data length: 8 bit */
1169 SET_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
1170 hspi
->RxISR
= SPI_RxISR_8BIT
;
1173 /* Configure communication direction : 1Line */
1174 if(hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)
1179 #if (USE_SPI_CRC != 0U)
1180 /* Reset CRC Calculation */
1181 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
1183 SPI_RESET_CRC(hspi
);
1187 /* Enable TXE and ERR interrupt */
1188 __HAL_SPI_ENABLE_IT(hspi
, (SPI_IT_RXNE
| SPI_IT_ERR
));
1190 /* Check if the SPI is already enabled */
1191 if((hspi
->Instance
->CR1
& SPI_CR1_SPE
) != SPI_CR1_SPE
)
1193 /* Enable SPI peripheral */
1194 __HAL_SPI_ENABLE(hspi
);
1198 /* Process Unlocked */
1204 * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt.
1205 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1206 * the configuration information for SPI module.
1207 * @param pTxData: pointer to transmission data buffer
1208 * @param pRxData: pointer to reception data buffer
1209 * @param Size: amount of data to be sent and received
1210 * @retval HAL status
1212 HAL_StatusTypeDef
HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef
*hspi
, uint8_t *pTxData
, uint8_t *pRxData
, uint16_t Size
)
1214 HAL_StatusTypeDef errorcode
= HAL_OK
;
1215 assert_param(IS_SPI_DIRECTION_2LINES(hspi
->Init
.Direction
));
1217 /* Process locked */
1220 if(!((hspi
->State
== HAL_SPI_STATE_READY
) || \
1221 ((hspi
->Init
.Mode
== SPI_MODE_MASTER
) && (hspi
->Init
.Direction
== SPI_DIRECTION_2LINES
) && (hspi
->State
== HAL_SPI_STATE_BUSY_RX
))))
1223 errorcode
= HAL_BUSY
;
1227 if((pTxData
== NULL
) || (pRxData
== NULL
) || (Size
== 0))
1229 errorcode
= HAL_ERROR
;
1234 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
1237 if((hspi
->Init
.DataSize
<= SPI_DATASIZE_8BIT
) && (hspi
->Init
.CRCLength
== SPI_CRC_LENGTH_16BIT
))
1243 if(hspi
->State
!= HAL_SPI_STATE_BUSY_RX
)
1245 hspi
->State
= HAL_SPI_STATE_BUSY_TX_RX
;
1248 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
1249 hspi
->pTxBuffPtr
= pTxData
;
1250 hspi
->TxXferSize
= Size
;
1251 hspi
->TxXferCount
= Size
;
1252 hspi
->pRxBuffPtr
= pRxData
;
1253 hspi
->RxXferSize
= Size
;
1254 hspi
->RxXferCount
= Size
;
1256 /* Set the function for IT treatment */
1257 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
1259 hspi
->RxISR
= SPI_2linesRxISR_16BIT
;
1260 hspi
->TxISR
= SPI_2linesTxISR_16BIT
;
1264 hspi
->RxISR
= SPI_2linesRxISR_8BIT
;
1265 hspi
->TxISR
= SPI_2linesTxISR_8BIT
;
1268 #if (USE_SPI_CRC != 0U)
1269 /* Reset CRC Calculation */
1270 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
1272 SPI_RESET_CRC(hspi
);
1276 /* check if packing mode is enabled and if there is more than 2 data to receive */
1277 if((hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
) || (hspi
->RxXferCount
>= 2))
1279 /* set fiforxthresold according the reception data length: 16 bit */
1280 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
1284 /* set fiforxthresold according the reception data length: 8 bit */
1285 SET_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
1288 /* Enable TXE, RXNE and ERR interrupt */
1289 __HAL_SPI_ENABLE_IT(hspi
, (SPI_IT_TXE
| SPI_IT_RXNE
| SPI_IT_ERR
));
1291 /* Check if the SPI is already enabled */
1292 if((hspi
->Instance
->CR1
& SPI_CR1_SPE
) != SPI_CR1_SPE
)
1294 /* Enable SPI peripheral */
1295 __HAL_SPI_ENABLE(hspi
);
1299 /* Process Unlocked */
1305 * @brief Transmit an amount of data in non-blocking mode with DMA.
1306 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1307 * the configuration information for SPI module.
1308 * @param pData: pointer to data buffer
1309 * @param Size: amount of data to be sent
1310 * @retval HAL status
1312 HAL_StatusTypeDef
HAL_SPI_Transmit_DMA(SPI_HandleTypeDef
*hspi
, uint8_t *pData
, uint16_t Size
)
1314 HAL_StatusTypeDef errorcode
= HAL_OK
;
1315 assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi
->Init
.Direction
));
1317 /* Process Locked */
1320 if(hspi
->State
!= HAL_SPI_STATE_READY
)
1322 errorcode
= HAL_BUSY
;
1326 if((pData
== NULL
) || (Size
== 0))
1328 errorcode
= HAL_ERROR
;
1332 hspi
->State
= HAL_SPI_STATE_BUSY_TX
;
1333 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
1334 hspi
->pTxBuffPtr
= pData
;
1335 hspi
->TxXferSize
= Size
;
1336 hspi
->TxXferCount
= Size
;
1337 hspi
->pRxBuffPtr
= (uint8_t *)NULL
;
1338 hspi
->RxXferSize
= 0;
1339 hspi
->RxXferCount
= 0;
1341 /* Configure communication direction : 1Line */
1342 if(hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)
1347 #if (USE_SPI_CRC != 0U)
1348 /* Reset CRC Calculation */
1349 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
1351 SPI_RESET_CRC(hspi
);
1355 /* Set the SPI TxDMA Half transfer complete callback */
1356 hspi
->hdmatx
->XferHalfCpltCallback
= SPI_DMAHalfTransmitCplt
;
1358 /* Set the SPI TxDMA transfer complete callback */
1359 hspi
->hdmatx
->XferCpltCallback
= SPI_DMATransmitCplt
;
1361 /* Set the DMA error callback */
1362 hspi
->hdmatx
->XferErrorCallback
= SPI_DMAError
;
1364 /* Set the DMA abort callback */
1365 hspi
->hdmatx
->XferAbortCallback
= SPI_DMAAbortOnError
;
1367 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_LDMATX
);
1368 /* packing mode is enabled only if the DMA setting is HALWORD */
1369 if((hspi
->Init
.DataSize
<= SPI_DATASIZE_8BIT
) && (hspi
->hdmatx
->Init
.MemDataAlignment
== DMA_MDATAALIGN_HALFWORD
))
1371 /* Check the even/odd of the data size + crc if enabled */
1372 if((hspi
->TxXferCount
& 0x1) == 0)
1374 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_LDMATX
);
1375 hspi
->TxXferCount
= (hspi
->TxXferCount
>> 1);
1379 SET_BIT(hspi
->Instance
->CR2
, SPI_CR2_LDMATX
);
1380 hspi
->TxXferCount
= (hspi
->TxXferCount
>> 1) + 1;
1384 /* Enable SPI Error interrupts, EIE: MODF, OVR, FE, FRE, CEC(depends on family) */
1385 SET_BIT(hspi
->Instance
->CR2
, (SPI_CR2_ERRIE
));
1386 SET_BIT(hspi
->Instance
->SR
, (SPI_SR_FRE
| SPI_SR_OVR
| SPI_SR_MODF
| SPI_SR_CRCERR
));
1388 /* Enable the Tx DMA channel */
1389 HAL_DMA_Start_IT(hspi
->hdmatx
, (uint32_t)hspi
->pTxBuffPtr
, (uint32_t)&hspi
->Instance
->DR
, hspi
->TxXferCount
);
1391 /* Check if the SPI is already enabled */
1392 if((hspi
->Instance
->CR1
&SPI_CR1_SPE
) != SPI_CR1_SPE
)
1394 /* Enable SPI peripheral */
1395 __HAL_SPI_ENABLE(hspi
);
1398 /* Enable Tx DMA Request */
1399 SET_BIT(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
);
1402 /* Process Unlocked */
1408 * @brief Receive an amount of data in non-blocking mode with DMA.
1409 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1410 * the configuration information for SPI module.
1411 * @param pData: pointer to data buffer
1412 * @note When the CRC feature is enabled the pData Length must be Size + 1.
1413 * @param Size: amount of data to be sent
1414 * @retval HAL status
1416 HAL_StatusTypeDef
HAL_SPI_Receive_DMA(SPI_HandleTypeDef
*hspi
, uint8_t *pData
, uint16_t Size
)
1418 HAL_StatusTypeDef errorcode
= HAL_OK
;
1420 /* Process Locked */
1423 if(hspi
->State
!= HAL_SPI_STATE_READY
)
1425 errorcode
= HAL_BUSY
;
1429 if((pData
== NULL
) || (Size
== 0))
1431 errorcode
= HAL_ERROR
;
1435 hspi
->State
= HAL_SPI_STATE_BUSY_RX
;
1436 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
1437 hspi
->pRxBuffPtr
= pData
;
1438 hspi
->RxXferSize
= Size
;
1439 hspi
->RxXferCount
= Size
;
1440 hspi
->pTxBuffPtr
= (uint8_t *)NULL
;
1441 hspi
->TxXferSize
= 0;
1442 hspi
->TxXferCount
= 0;
1444 if((hspi
->Init
.Mode
== SPI_MODE_MASTER
) && (hspi
->Init
.Direction
== SPI_DIRECTION_2LINES
))
1446 /* Process Unlocked */
1448 /* the receive process is not supported in 2Lines direction master mode */
1449 /* in this case we call the TransmitReceive process */
1450 return HAL_SPI_TransmitReceive_DMA(hspi
,pData
,pData
,Size
);
1453 /* Configure communication direction : 1Line */
1454 if(hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)
1459 #if (USE_SPI_CRC != 0U)
1460 /* Reset CRC Calculation */
1461 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
1463 SPI_RESET_CRC(hspi
);
1467 /* packing mode management is enabled by the DMA settings */
1468 if((hspi
->Init
.DataSize
<= SPI_DATASIZE_8BIT
) && (hspi
->hdmarx
->Init
.MemDataAlignment
== DMA_MDATAALIGN_HALFWORD
))
1470 /* Restriction the DMA data received is not allowed in this mode */
1471 errorcode
= HAL_ERROR
;
1475 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_LDMARX
);
1476 if( hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
1478 /* set fiforxthreshold according the reception data length: 16bit */
1479 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
1483 /* set fiforxthreshold according the reception data length: 8bit */
1484 SET_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
1487 /* Set the SPI RxDMA Half transfer complete callback */
1488 hspi
->hdmarx
->XferHalfCpltCallback
= SPI_DMAHalfReceiveCplt
;
1490 /* Set the SPI Rx DMA transfer complete callback */
1491 hspi
->hdmarx
->XferCpltCallback
= SPI_DMAReceiveCplt
;
1493 /* Set the DMA error callback */
1494 hspi
->hdmarx
->XferErrorCallback
= SPI_DMAError
;
1496 /* Set the DMA abort callback */
1497 hspi
->hdmatx
->XferAbortCallback
= SPI_DMAAbortOnError
;
1499 /* Enable SPI Error interrupts, EIE: MODF, OVR, FE, FRE, CEC(depends on family) */
1500 SET_BIT(hspi
->Instance
->CR2
, (SPI_CR2_ERRIE
));
1501 SET_BIT(hspi
->Instance
->SR
, (SPI_SR_FRE
| SPI_SR_OVR
| SPI_SR_MODF
| SPI_SR_CRCERR
));
1503 /* Enable Rx DMA Request */
1504 SET_BIT(hspi
->Instance
->CR2
, SPI_CR2_RXDMAEN
);
1506 /* Enable the Rx DMA channel */
1507 HAL_DMA_Start_IT(hspi
->hdmarx
, (uint32_t)&hspi
->Instance
->DR
, (uint32_t)hspi
->pRxBuffPtr
, hspi
->RxXferCount
);
1509 /* Check if the SPI is already enabled */
1510 if((hspi
->Instance
->CR1
& SPI_CR1_SPE
) != SPI_CR1_SPE
)
1512 /* Enable SPI peripheral */
1513 __HAL_SPI_ENABLE(hspi
);
1517 /* Process Unlocked */
1523 * @brief Transmit and Receive an amount of data in non-blocking mode with DMA.
1524 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1525 * the configuration information for SPI module.
1526 * @param pTxData: pointer to transmission data buffer
1527 * @param pRxData: pointer to reception data buffer
1528 * @note When the CRC feature is enabled the pRxData Length must be Size + 1
1529 * @param Size: amount of data to be sent
1530 * @retval HAL status
1532 HAL_StatusTypeDef
HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef
*hspi
, uint8_t *pTxData
, uint8_t *pRxData
, uint16_t Size
)
1534 HAL_StatusTypeDef errorcode
= HAL_OK
;
1535 assert_param(IS_SPI_DIRECTION_2LINES(hspi
->Init
.Direction
));
1537 /* Process locked */
1540 if(!((hspi
->State
== HAL_SPI_STATE_READY
) ||
1541 ((hspi
->Init
.Mode
== SPI_MODE_MASTER
) && (hspi
->Init
.Direction
== SPI_DIRECTION_2LINES
) && (hspi
->State
== HAL_SPI_STATE_BUSY_RX
))))
1543 errorcode
= HAL_BUSY
;
1547 if((pTxData
== NULL
) || (pRxData
== NULL
) || (Size
== 0))
1549 errorcode
= HAL_ERROR
;
1553 /* check if the transmit Receive function is not called by a receive master */
1554 if(hspi
->State
!= HAL_SPI_STATE_BUSY_RX
)
1556 hspi
->State
= HAL_SPI_STATE_BUSY_TX_RX
;
1559 hspi
->ErrorCode
= HAL_SPI_ERROR_NONE
;
1560 hspi
->pTxBuffPtr
= (uint8_t *)pTxData
;
1561 hspi
->TxXferSize
= Size
;
1562 hspi
->TxXferCount
= Size
;
1563 hspi
->pRxBuffPtr
= (uint8_t *)pRxData
;
1564 hspi
->RxXferSize
= Size
;
1565 hspi
->RxXferCount
= Size
;
1567 #if (USE_SPI_CRC != 0U)
1568 /* Reset CRC Calculation + increase the rxsize */
1569 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
1571 SPI_RESET_CRC(hspi
);
1575 /* Reset the threshold bit */
1576 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_LDMATX
| SPI_CR2_LDMARX
);
1578 /* the packing mode management is enabled by the DMA settings according the spi data size */
1579 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
1581 /* set fiforxthreshold according the reception data length: 16bit */
1582 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
1586 /* set fiforxthresold according the reception data length: 8bit */
1587 SET_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
1589 if(hspi
->hdmatx
->Init
.MemDataAlignment
== DMA_MDATAALIGN_HALFWORD
)
1591 if((hspi
->TxXferSize
& 0x1) == 0x0)
1593 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_LDMATX
);
1594 hspi
->TxXferCount
= hspi
->TxXferCount
>> 1;
1598 SET_BIT(hspi
->Instance
->CR2
, SPI_CR2_LDMATX
);
1599 hspi
->TxXferCount
= (hspi
->TxXferCount
>> 1) + 1;
1603 if(hspi
->hdmarx
->Init
.MemDataAlignment
== DMA_MDATAALIGN_HALFWORD
)
1605 /* set fiforxthresold according the reception data length: 16bit */
1606 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
1608 if((hspi
->RxXferCount
& 0x1) == 0x0 )
1610 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_LDMARX
);
1611 hspi
->RxXferCount
= hspi
->RxXferCount
>> 1;
1615 SET_BIT(hspi
->Instance
->CR2
, SPI_CR2_LDMARX
);
1616 hspi
->RxXferCount
= (hspi
->RxXferCount
>> 1) + 1;
1621 /* Set the SPI Rx DMA transfer complete callback if the transfer request is a
1622 reception request (RXNE) */
1623 if(hspi
->State
== HAL_SPI_STATE_BUSY_RX
)
1625 /* Set the SPI Rx DMA Half transfer complete callback */
1626 hspi
->hdmarx
->XferHalfCpltCallback
= SPI_DMAHalfReceiveCplt
;
1627 hspi
->hdmarx
->XferCpltCallback
= SPI_DMAReceiveCplt
;
1631 /* Set the SPI Rx DMA Half transfer complete callback */
1632 hspi
->hdmarx
->XferHalfCpltCallback
= SPI_DMAHalfTransmitReceiveCplt
;
1633 hspi
->hdmarx
->XferCpltCallback
= SPI_DMATransmitReceiveCplt
;
1636 /* Set the DMA error callback */
1637 hspi
->hdmarx
->XferErrorCallback
= SPI_DMAError
;
1639 /* Set the DMA abort callback */
1640 hspi
->hdmarx
->XferAbortCallback
= SPI_DMAAbortOnError
;
1642 /* Enable SPI Error interrupts, EIE: MODF, OVR, FE, FRE, CEC(depends on family) */
1643 SET_BIT(hspi
->Instance
->CR2
, (SPI_CR2_ERRIE
));
1644 SET_BIT(hspi
->Instance
->SR
, (SPI_SR_FRE
| SPI_SR_OVR
| SPI_SR_MODF
| SPI_SR_CRCERR
));
1646 /* Enable Rx DMA Request */
1647 SET_BIT(hspi
->Instance
->CR2
, SPI_CR2_RXDMAEN
);
1649 /* Enable the Rx DMA channel */
1650 HAL_DMA_Start_IT(hspi
->hdmarx
, (uint32_t)&hspi
->Instance
->DR
, (uint32_t) hspi
->pRxBuffPtr
, hspi
->RxXferCount
);
1652 /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
1653 is performed in DMA reception complete callback */
1654 hspi
->hdmatx
->XferHalfCpltCallback
= NULL
;
1655 hspi
->hdmatx
->XferCpltCallback
= NULL
;
1657 /* Set the DMA error callback */
1658 hspi
->hdmatx
->XferErrorCallback
= SPI_DMAError
;
1660 /* Set the DMA abort callback */
1661 hspi
->hdmatx
->XferAbortCallback
= SPI_DMAAbortOnError
;
1663 /* Enable the Tx DMA channel */
1664 HAL_DMA_Start_IT(hspi
->hdmatx
, (uint32_t)hspi
->pTxBuffPtr
, (uint32_t)&hspi
->Instance
->DR
, hspi
->TxXferCount
);
1666 /* Check if the SPI is already enabled */
1667 if((hspi
->Instance
->CR1
&SPI_CR1_SPE
) != SPI_CR1_SPE
)
1669 /* Enable SPI peripheral */
1670 __HAL_SPI_ENABLE(hspi
);
1673 /* Enable Tx DMA Request */
1674 SET_BIT(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
);
1677 /* Process Unlocked */
1683 * @brief Pause the DMA Transfer.
1684 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1685 * the configuration information for the specified SPI module.
1686 * @retval HAL status
1688 HAL_StatusTypeDef
HAL_SPI_DMAPause(SPI_HandleTypeDef
*hspi
)
1690 /* Process Locked */
1693 /* Disable the SPI DMA Tx & Rx requests */
1694 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
| SPI_CR2_RXDMAEN
);
1696 /* Process Unlocked */
1703 * @brief Resumes the DMA Transfer.
1704 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1705 * the configuration information for the specified SPI module.
1706 * @retval HAL status
1708 HAL_StatusTypeDef
HAL_SPI_DMAResume(SPI_HandleTypeDef
*hspi
)
1710 /* Process Locked */
1713 /* Enable the SPI DMA Tx & Rx requests */
1714 SET_BIT(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
| SPI_CR2_RXDMAEN
);
1716 /* Process Unlocked */
1723 * @brief Stops the DMA Transfer.
1724 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1725 * the configuration information for the specified SPI module.
1726 * @retval HAL status
1728 HAL_StatusTypeDef
HAL_SPI_DMAStop(SPI_HandleTypeDef
*hspi
)
1730 /* The Lock is not implemented on this API to allow the user application
1731 to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
1732 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
1733 and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
1736 /* Abort the SPI DMA tx Stream */
1737 if(hspi
->hdmatx
!= NULL
)
1739 HAL_DMA_Abort(hspi
->hdmatx
);
1741 /* Abort the SPI DMA rx Stream */
1742 if(hspi
->hdmarx
!= NULL
)
1744 HAL_DMA_Abort(hspi
->hdmarx
);
1747 /* Disable the SPI DMA Tx & Rx requests */
1748 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
| SPI_CR2_RXDMAEN
);
1749 hspi
->State
= HAL_SPI_STATE_READY
;
1754 * @brief This function handles SPI interrupt request.
1755 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1756 * the configuration information for the specified SPI module.
1759 void HAL_SPI_IRQHandler(SPI_HandleTypeDef
*hspi
)
1761 uint32_t itsource
= hspi
->Instance
->CR2
;
1762 uint32_t itflag
= hspi
->Instance
->SR
;
1764 /* SPI in mode Receiver ----------------------------------------------------*/
1765 if(((itflag
& SPI_FLAG_OVR
) == RESET
) &&
1766 ((itflag
& SPI_FLAG_RXNE
) != RESET
) && ((itsource
& SPI_IT_RXNE
) != RESET
))
1772 /* SPI in mode Transmitter ---------------------------------------------------*/
1773 if(((itflag
& SPI_FLAG_TXE
) != RESET
) && ((itsource
& SPI_IT_TXE
) != RESET
))
1779 /* SPI in Error Treatment ---------------------------------------------------*/
1780 if((itflag
& (SPI_FLAG_MODF
| SPI_FLAG_OVR
| SPI_FLAG_FRE
)) != RESET
)
1782 /* SPI Overrun error interrupt occurred -------------------------------------*/
1783 if((itflag
& SPI_FLAG_OVR
) != RESET
)
1785 if(hspi
->State
!= HAL_SPI_STATE_BUSY_TX
)
1787 hspi
->ErrorCode
|= HAL_SPI_ERROR_OVR
;
1788 __HAL_SPI_CLEAR_OVRFLAG(hspi
);
1796 /* SPI Mode Fault error interrupt occurred -------------------------------------*/
1797 if((itflag
& SPI_FLAG_MODF
) != RESET
)
1799 hspi
->ErrorCode
|= HAL_SPI_ERROR_MODF
;
1800 __HAL_SPI_CLEAR_MODFFLAG(hspi
);
1803 /* SPI Frame error interrupt occurred ----------------------------------------*/
1804 if((itflag
& SPI_FLAG_FRE
) != RESET
)
1806 hspi
->ErrorCode
|= HAL_SPI_ERROR_FRE
;
1807 __HAL_SPI_CLEAR_FREFLAG(hspi
);
1810 if(hspi
->ErrorCode
!= HAL_SPI_ERROR_NONE
)
1812 /* All SPI errors are treated as Blocking errors : transfer is aborted.
1813 Set the SPI state to ready so as to be able to restart the process,
1814 Disable Rx/Tx Interrupts, and disable DMA Rx/Tx requests, if ongoing */
1816 /* Disable TXE, RXNE, MODF, OVR, FRE, and CRCERR (Master mode fault, Overrun error, TI frame format error, CRC protocol error) interrupts */
1817 CLEAR_BIT(hspi
->Instance
->CR1
, (SPI_CR2_RXNEIE
| SPI_CR2_TXEIE
| SPI_CR2_ERRIE
));
1818 CLEAR_BIT(hspi
->Instance
->SR
, (SPI_SR_FRE
| SPI_SR_OVR
| SPI_SR_MODF
| SPI_SR_CRCERR
));
1820 /* Restore SPI State to Ready */
1821 hspi
->State
= HAL_SPI_STATE_READY
;
1823 /* Disable the SPI DMA requests if enabled */
1824 if ((HAL_IS_BIT_SET(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
))||(HAL_IS_BIT_SET(hspi
->Instance
->CR2
, SPI_CR2_RXDMAEN
)))
1826 CLEAR_BIT(hspi
->Instance
->CR2
, (SPI_CR2_TXDMAEN
| SPI_CR2_RXDMAEN
));
1828 /* Abort the SPI DMA Rx channel */
1829 if(hspi
->hdmarx
!= NULL
)
1831 /* Set the SPI DMA Abort callback :
1832 will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
1833 hspi
->hdmarx
->XferAbortCallback
= SPI_DMAAbortOnError
;
1836 if(HAL_DMA_Abort_IT(hspi
->hdmarx
) != HAL_OK
)
1838 /* Call Directly hspi->hdmarx->XferAbortCallback function in case of error */
1839 hspi
->hdmarx
->XferAbortCallback(hspi
->hdmarx
);
1842 /* Abort the SPI DMA Tx channel */
1843 if(hspi
->hdmatx
!= NULL
)
1845 /* Set the SPI DMA Abort callback :
1846 will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
1847 hspi
->hdmatx
->XferAbortCallback
= SPI_DMAAbortOnError
;
1850 if(HAL_DMA_Abort_IT(hspi
->hdmatx
) != HAL_OK
)
1852 /* Call Directly hspi->hdmatx->XferAbortCallback function in case of error */
1853 hspi
->hdmatx
->XferAbortCallback(hspi
->hdmatx
);
1859 /* Call user error callback */
1860 HAL_SPI_ErrorCallback(hspi
);
1867 * @brief Tx Transfer completed callback.
1868 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1869 * the configuration information for SPI module.
1872 __weak
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef
*hspi
)
1874 /* Prevent unused argument(s) compilation warning */
1877 /* NOTE : This function should not be modified, when the callback is needed,
1878 the HAL_SPI_TxCpltCallback should be implemented in the user file
1883 * @brief Rx Transfer completed callback.
1884 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1885 * the configuration information for SPI module.
1888 __weak
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef
*hspi
)
1890 /* Prevent unused argument(s) compilation warning */
1893 /* NOTE : This function should not be modified, when the callback is needed,
1894 the HAL_SPI_RxCpltCallback should be implemented in the user file
1899 * @brief Tx and Rx Transfer completed callback.
1900 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1901 * the configuration information for SPI module.
1904 __weak
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef
*hspi
)
1906 /* Prevent unused argument(s) compilation warning */
1909 /* NOTE : This function should not be modified, when the callback is needed,
1910 the HAL_SPI_TxRxCpltCallback should be implemented in the user file
1915 * @brief Tx Half Transfer completed callback.
1916 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1917 * the configuration information for SPI module.
1920 __weak
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef
*hspi
)
1922 /* Prevent unused argument(s) compilation warning */
1925 /* NOTE : This function should not be modified, when the callback is needed,
1926 the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
1931 * @brief Rx Half Transfer completed callback.
1932 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1933 * the configuration information for SPI module.
1936 __weak
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef
*hspi
)
1938 /* Prevent unused argument(s) compilation warning */
1941 /* NOTE : This function should not be modified, when the callback is needed,
1942 the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
1947 * @brief Tx and Rx Half Transfer callback.
1948 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1949 * the configuration information for SPI module.
1952 __weak
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef
*hspi
)
1954 /* Prevent unused argument(s) compilation warning */
1957 /* NOTE : This function should not be modified, when the callback is needed,
1958 the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
1963 * @brief SPI error callback.
1964 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
1965 * the configuration information for SPI module.
1968 __weak
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef
*hspi
)
1970 /* Prevent unused argument(s) compilation warning */
1973 /* NOTE : This function should not be modified, when the callback is needed,
1974 the HAL_SPI_ErrorCallback should be implemented in the user file
1976 /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
1977 and user can use HAL_SPI_GetError() API to check the latest error occurred
1985 /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
1986 * @brief SPI control functions
1989 ===============================================================================
1990 ##### Peripheral State and Errors functions #####
1991 ===============================================================================
1993 This subsection provides a set of functions allowing to control the SPI.
1994 (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
1995 (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
2001 * @brief Return the SPI handle state.
2002 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2003 * the configuration information for SPI module.
2006 HAL_SPI_StateTypeDef
HAL_SPI_GetState(SPI_HandleTypeDef
*hspi
)
2008 /* Return SPI handle state */
2013 * @brief Return the SPI error code.
2014 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2015 * the configuration information for SPI module.
2016 * @retval SPI error code in bitmap format
2018 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef
*hspi
)
2020 return hspi
->ErrorCode
;
2032 /** @addtogroup SPI_Private_Functions
2033 * @brief Private functions
2038 * @brief DMA SPI transmit process complete callback.
2039 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2040 * the configuration information for the specified DMA module.
2043 static void SPI_DMATransmitCplt(DMA_HandleTypeDef
*hdma
)
2045 SPI_HandleTypeDef
* hspi
= ( SPI_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
2047 /* DMA Normal Mode */
2048 if((hdma
->Instance
->CR
& DMA_SxCR_CIRC
) == 0)
2050 /* Disable Tx DMA Request */
2051 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
);
2053 /* Check the end of the transaction */
2054 if(SPI_EndRxTxTransaction(hspi
,SPI_DEFAULT_TIMEOUT
) != HAL_OK
)
2056 hspi
->ErrorCode
= HAL_SPI_ERROR_FLAG
;
2059 /* Clear overrun flag in 2 Lines communication mode because received data is not read */
2060 if(hspi
->Init
.Direction
== SPI_DIRECTION_2LINES
)
2062 __HAL_SPI_CLEAR_OVRFLAG(hspi
);
2065 hspi
->TxXferCount
= 0;
2066 hspi
->State
= HAL_SPI_STATE_READY
;
2068 if(hspi
->ErrorCode
!= HAL_SPI_ERROR_NONE
)
2070 HAL_SPI_ErrorCallback(hspi
);
2074 HAL_SPI_TxCpltCallback(hspi
);
2078 * @brief DMA SPI receive process complete callback.
2079 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2080 * the configuration information for the specified DMA module.
2083 static void SPI_DMAReceiveCplt(DMA_HandleTypeDef
*hdma
)
2085 SPI_HandleTypeDef
* hspi
= ( SPI_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
2087 /* DMA Normal mode */
2088 if((hdma
->Instance
->CR
& DMA_SxCR_CIRC
) == 0)
2091 #if (USE_SPI_CRC != 0U)
2092 __IO
uint16_t tmpreg
;
2094 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2096 /* Wait until TXE flag */
2097 if(SPI_WaitFlagStateUntilTimeout(hspi
, SPI_FLAG_RXNE
, SPI_FLAG_RXNE
, SPI_DEFAULT_TIMEOUT
) != HAL_OK
)
2099 /* Error on the CRC reception */
2100 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
2102 if(hspi
->Init
.DataSize
> SPI_DATASIZE_8BIT
)
2104 tmpreg
= hspi
->Instance
->DR
;
2105 UNUSED(tmpreg
); /* To avoid GCC warning */
2109 tmpreg
= *(__IO
uint8_t *)&hspi
->Instance
->DR
;
2110 UNUSED(tmpreg
); /* To avoid GCC warning */
2112 if(hspi
->Init
.CRCLength
== SPI_CRC_LENGTH_16BIT
)
2114 if(SPI_WaitFlagStateUntilTimeout(hspi
, SPI_FLAG_RXNE
, SPI_FLAG_RXNE
, SPI_DEFAULT_TIMEOUT
) != HAL_OK
)
2116 /* Error on the CRC reception */
2117 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
2119 tmpreg
= *(__IO
uint8_t *)&hspi
->Instance
->DR
;
2120 UNUSED(tmpreg
); /* To avoid GCC warning */
2126 /* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) */
2127 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
| SPI_CR2_RXDMAEN
);
2129 /* Check the end of the transaction */
2130 if(SPI_EndRxTransaction(hspi
,SPI_DEFAULT_TIMEOUT
)!=HAL_OK
)
2132 hspi
->ErrorCode
|= HAL_SPI_ERROR_FLAG
;
2135 hspi
->RxXferCount
= 0;
2136 hspi
->State
= HAL_SPI_STATE_READY
;
2138 #if (USE_SPI_CRC != 0U)
2139 /* Check if CRC error occurred */
2140 if(__HAL_SPI_GET_FLAG(hspi
, SPI_FLAG_CRCERR
) != RESET
)
2142 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
2143 __HAL_SPI_CLEAR_CRCERRFLAG(hspi
);
2147 if(hspi
->ErrorCode
!= HAL_SPI_ERROR_NONE
)
2149 HAL_SPI_ErrorCallback(hspi
);
2153 HAL_SPI_RxCpltCallback(hspi
);
2157 * @brief DMA SPI transmit receive process complete callback.
2158 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
2159 * the configuration information for the specified DMA module.
2162 static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef
*hdma
)
2164 SPI_HandleTypeDef
* hspi
= ( SPI_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
2165 #if (USE_SPI_CRC != 0U)
2166 __IO
uint16_t tmpreg
;
2168 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2170 if((hspi
->Init
.DataSize
== SPI_DATASIZE_8BIT
) && (hspi
->Init
.CRCLength
== SPI_CRC_LENGTH_8BIT
))
2172 if(SPI_WaitFifoStateUntilTimeout(hspi
, SPI_FLAG_FRLVL
, SPI_FRLVL_QUARTER_FULL
, SPI_DEFAULT_TIMEOUT
) != HAL_OK
)
2174 /* Error on the CRC reception */
2175 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
2177 tmpreg
= *(__IO
uint8_t *)&hspi
->Instance
->DR
;
2178 UNUSED(tmpreg
); /* To avoid GCC warning */
2182 if(SPI_WaitFifoStateUntilTimeout(hspi
, SPI_FLAG_FRLVL
, SPI_FRLVL_HALF_FULL
, SPI_DEFAULT_TIMEOUT
) != HAL_OK
)
2184 /* Error on the CRC reception */
2185 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
2187 tmpreg
= hspi
->Instance
->DR
;
2188 UNUSED(tmpreg
); /* To avoid GCC warning */
2193 /* Check the end of the transaction */
2194 if(SPI_EndRxTxTransaction(hspi
,SPI_DEFAULT_TIMEOUT
) != HAL_OK
)
2196 hspi
->ErrorCode
= HAL_SPI_ERROR_FLAG
;
2199 /* Disable Rx/Tx DMA Request */
2200 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
| SPI_CR2_RXDMAEN
);
2202 hspi
->TxXferCount
= 0;
2203 hspi
->RxXferCount
= 0;
2204 hspi
->State
= HAL_SPI_STATE_READY
;
2206 #if (USE_SPI_CRC != 0U)
2207 /* Check if CRC error occurred */
2208 if(__HAL_SPI_GET_FLAG(hspi
, SPI_FLAG_CRCERR
) != RESET
)
2210 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
2211 __HAL_SPI_CLEAR_CRCERRFLAG(hspi
);
2215 if(hspi
->ErrorCode
!= HAL_SPI_ERROR_NONE
)
2217 HAL_SPI_ErrorCallback(hspi
);
2220 HAL_SPI_TxRxCpltCallback(hspi
);
2224 * @brief DMA SPI half transmit process complete callback.
2225 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
2226 * the configuration information for the specified DMA module.
2229 static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef
*hdma
)
2231 SPI_HandleTypeDef
* hspi
= ( SPI_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
2232 HAL_SPI_TxHalfCpltCallback(hspi
);
2236 * @brief DMA SPI half receive process complete callback.
2237 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
2238 * the configuration information for the specified DMA module.
2241 static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef
*hdma
)
2243 SPI_HandleTypeDef
* hspi
= ( SPI_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
2244 HAL_SPI_RxHalfCpltCallback(hspi
);
2248 * @brief DMA SPI half transmit receive process complete callback.
2249 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
2250 * the configuration information for the specified DMA module.
2253 static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef
*hdma
)
2255 SPI_HandleTypeDef
* hspi
= ( SPI_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
2256 HAL_SPI_TxRxHalfCpltCallback(hspi
);
2260 * @brief DMA SPI communication error callback.
2261 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
2262 * the configuration information for the specified DMA module.
2265 static void SPI_DMAError(DMA_HandleTypeDef
*hdma
)
2267 SPI_HandleTypeDef
* hspi
= ( SPI_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
2269 /* Stop the disable DMA transfer on SPI side */
2270 CLEAR_BIT(hspi
->Instance
->CR2
, SPI_CR2_TXDMAEN
| SPI_CR2_RXDMAEN
);
2272 hspi
->ErrorCode
|= HAL_SPI_ERROR_DMA
;
2273 hspi
->State
= HAL_SPI_STATE_READY
;
2274 HAL_SPI_ErrorCallback(hspi
);
2278 * @brief DMA SPI communication abort callback
2279 * (To be called at end of DMA Abort procedure).
2280 * @param hdma: DMA handle.
2283 static void SPI_DMAAbortOnError(DMA_HandleTypeDef
*hdma
)
2285 SPI_HandleTypeDef
* hspi
= ( SPI_HandleTypeDef
* )((DMA_HandleTypeDef
* )hdma
)->Parent
;
2286 hspi
->RxXferCount
= 0U;
2287 hspi
->TxXferCount
= 0U;
2289 HAL_SPI_ErrorCallback(hspi
);
2293 * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode.
2294 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2295 * the configuration information for SPI module.
2298 static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef
*hspi
)
2300 /* Receive data in packing mode */
2301 if(hspi
->RxXferCount
> 1)
2303 *((uint16_t*)hspi
->pRxBuffPtr
) = hspi
->Instance
->DR
;
2304 hspi
->pRxBuffPtr
+= sizeof(uint16_t);
2305 hspi
->RxXferCount
-= 2;
2306 if(hspi
->RxXferCount
== 1)
2308 /* set fiforxthreshold according the reception data length: 8bit */
2309 SET_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
2312 /* Receive data in 8 Bit mode */
2315 *hspi
->pRxBuffPtr
++ = *((__IO
uint8_t *)&hspi
->Instance
->DR
);
2316 hspi
->RxXferCount
--;
2319 /* check end of the reception */
2320 if(hspi
->RxXferCount
== 0)
2322 #if (USE_SPI_CRC != 0U)
2323 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2325 SET_BIT(hspi
->Instance
->CR2
, SPI_RXFIFO_THRESHOLD
);
2326 hspi
->RxISR
= SPI_2linesRxISR_8BITCRC
;
2331 /* Disable RXNE interrupt */
2332 __HAL_SPI_DISABLE_IT(hspi
, SPI_IT_RXNE
);
2334 if(hspi
->TxXferCount
== 0)
2336 SPI_CloseRxTx_ISR(hspi
);
2341 #if (USE_SPI_CRC != 0U)
2343 * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode.
2344 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2345 * the configuration information for SPI module.
2348 static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef
*hspi
)
2350 __IO
uint8_t tmpreg
= *((__IO
uint8_t *)&hspi
->Instance
->DR
);
2351 UNUSED(tmpreg
); /* To avoid GCC warning */
2355 /* check end of the reception */
2356 if(hspi
->CRCSize
== 0)
2358 /* Disable RXNE interrupt */
2359 __HAL_SPI_DISABLE_IT(hspi
, SPI_IT_RXNE
);
2361 if(hspi
->TxXferCount
== 0)
2363 SPI_CloseRxTx_ISR(hspi
);
2370 * @brief Tx 8-bit handler for Transmit and Receive in Interrupt mode.
2371 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2372 * the configuration information for SPI module.
2375 static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef
*hspi
)
2377 /* Transmit data in packing Bit mode */
2378 if(hspi
->TxXferCount
>= 2)
2380 hspi
->Instance
->DR
= *((uint16_t *)hspi
->pTxBuffPtr
);
2381 hspi
->pTxBuffPtr
+= sizeof(uint16_t);
2382 hspi
->TxXferCount
-= 2;
2384 /* Transmit data in 8 Bit mode */
2387 *(__IO
uint8_t *)&hspi
->Instance
->DR
= (*hspi
->pTxBuffPtr
++);
2388 hspi
->TxXferCount
--;
2391 /* check the end of the transmission */
2392 if(hspi
->TxXferCount
== 0)
2394 #if (USE_SPI_CRC != 0U)
2395 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2397 hspi
->Instance
->CR1
|= SPI_CR1_CRCNEXT
;
2401 /* Disable TXE interrupt */
2402 __HAL_SPI_DISABLE_IT(hspi
, SPI_IT_TXE
);
2404 if(hspi
->RxXferCount
== 0)
2406 SPI_CloseRxTx_ISR(hspi
);
2412 * @brief Rx 16-bit handler for Transmit and Receive in Interrupt mode.
2413 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2414 * the configuration information for SPI module.
2417 static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef
*hspi
)
2419 /* Receive data in 16 Bit mode */
2420 *((uint16_t*)hspi
->pRxBuffPtr
) = hspi
->Instance
->DR
;
2421 hspi
->pRxBuffPtr
+= sizeof(uint16_t);
2422 hspi
->RxXferCount
--;
2424 if(hspi
->RxXferCount
== 0)
2426 #if (USE_SPI_CRC != 0U)
2427 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2429 hspi
->RxISR
= SPI_2linesRxISR_16BITCRC
;
2434 /* Disable RXNE interrupt */
2435 __HAL_SPI_DISABLE_IT(hspi
, SPI_IT_RXNE
);
2437 if(hspi
->TxXferCount
== 0)
2439 SPI_CloseRxTx_ISR(hspi
);
2444 #if (USE_SPI_CRC != 0U)
2446 * @brief Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode.
2447 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2448 * the configuration information for SPI module.
2451 static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef
*hspi
)
2453 /* Receive data in 16 Bit mode */
2454 __IO
uint16_t tmpreg
= hspi
->Instance
->DR
;
2455 UNUSED(tmpreg
); /* To avoid GCC warning */
2457 /* Disable RXNE interrupt */
2458 __HAL_SPI_DISABLE_IT(hspi
, SPI_IT_RXNE
);
2460 SPI_CloseRxTx_ISR(hspi
);
2465 * @brief Tx 16-bit handler for Transmit and Receive in Interrupt mode.
2466 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2467 * the configuration information for SPI module.
2470 static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef
*hspi
)
2472 /* Transmit data in 16 Bit mode */
2473 hspi
->Instance
->DR
= *((uint16_t *)hspi
->pTxBuffPtr
);
2474 hspi
->pTxBuffPtr
+= sizeof(uint16_t);
2475 hspi
->TxXferCount
--;
2477 /* Enable CRC Transmission */
2478 if(hspi
->TxXferCount
== 0)
2480 #if (USE_SPI_CRC != 0U)
2481 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2483 hspi
->Instance
->CR1
|= SPI_CR1_CRCNEXT
;
2487 /* Disable TXE interrupt */
2488 __HAL_SPI_DISABLE_IT(hspi
, SPI_IT_TXE
);
2490 if(hspi
->RxXferCount
== 0)
2492 SPI_CloseRxTx_ISR(hspi
);
2497 #if (USE_SPI_CRC != 0U)
2499 * @brief Manage the CRC 8-bit receive in Interrupt context.
2500 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2501 * the configuration information for SPI module.
2504 static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef
*hspi
)
2506 __IO
uint8_t tmpreg
;
2507 tmpreg
= *((__IO
uint8_t*)&hspi
->Instance
->DR
);
2509 UNUSED(tmpreg
); /* To avoid GCC warning */
2513 if(hspi
->CRCSize
== 0)
2515 SPI_CloseRx_ISR(hspi
);
2521 * @brief Manage the receive 8-bit in Interrupt context.
2522 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2523 * the configuration information for SPI module.
2526 static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef
*hspi
)
2528 *hspi
->pRxBuffPtr
++ = (*(__IO
uint8_t *)&hspi
->Instance
->DR
);
2529 hspi
->RxXferCount
--;
2531 #if (USE_SPI_CRC != 0U)
2532 /* Enable CRC Transmission */
2533 if((hspi
->RxXferCount
== 1) && (hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
))
2535 hspi
->Instance
->CR1
|= SPI_CR1_CRCNEXT
;
2539 if(hspi
->RxXferCount
== 0)
2541 #if (USE_SPI_CRC != 0U)
2542 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2544 hspi
->RxISR
= SPI_RxISR_8BITCRC
;
2548 SPI_CloseRx_ISR(hspi
);
2552 #if (USE_SPI_CRC != 0U)
2554 * @brief Manage the CRC 16-bit receive in Interrupt context.
2555 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2556 * the configuration information for SPI module.
2559 static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef
*hspi
)
2561 __IO
uint16_t tmpreg
;
2563 tmpreg
= hspi
->Instance
->DR
;
2564 UNUSED(tmpreg
); /* To avoid GCC warning */
2566 /* Disable RXNE and ERR interrupt */
2567 __HAL_SPI_DISABLE_IT(hspi
, (SPI_IT_RXNE
| SPI_IT_ERR
));
2569 SPI_CloseRx_ISR(hspi
);
2574 * @brief Manage the 16-bit receive in Interrupt context.
2575 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2576 * the configuration information for SPI module.
2579 static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef
*hspi
)
2581 *((uint16_t *)hspi
->pRxBuffPtr
) = hspi
->Instance
->DR
;
2582 hspi
->pRxBuffPtr
+= sizeof(uint16_t);
2583 hspi
->RxXferCount
--;
2584 #if (USE_SPI_CRC != 0U)
2585 /* Enable CRC Transmission */
2586 if((hspi
->RxXferCount
== 1) && (hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
))
2588 hspi
->Instance
->CR1
|= SPI_CR1_CRCNEXT
;
2591 if(hspi
->RxXferCount
== 0)
2593 #if (USE_SPI_CRC != 0U)
2594 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2596 hspi
->RxISR
= SPI_RxISR_16BITCRC
;
2600 SPI_CloseRx_ISR(hspi
);
2605 * @brief Handle the data 8-bit transmit in Interrupt mode.
2606 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2607 * the configuration information for SPI module.
2610 static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef
*hspi
)
2612 *(__IO
uint8_t *)&hspi
->Instance
->DR
= (*hspi
->pTxBuffPtr
++);
2613 hspi
->TxXferCount
--;
2615 if(hspi
->TxXferCount
== 0)
2617 #if (USE_SPI_CRC != 0U)
2618 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2620 /* Enable CRC Transmission */
2621 hspi
->Instance
->CR1
|= SPI_CR1_CRCNEXT
;
2624 SPI_CloseTx_ISR(hspi
);
2629 * @brief Handle the data 16-bit transmit in Interrupt mode.
2630 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2631 * the configuration information for SPI module.
2634 static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef
*hspi
)
2636 /* Transmit data in 16 Bit mode */
2637 hspi
->Instance
->DR
= *((uint16_t *)hspi
->pTxBuffPtr
);
2638 hspi
->pTxBuffPtr
+= sizeof(uint16_t);
2639 hspi
->TxXferCount
--;
2641 if(hspi
->TxXferCount
== 0)
2643 #if (USE_SPI_CRC != 0U)
2644 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2646 /* Enable CRC Transmission */
2647 hspi
->Instance
->CR1
|= SPI_CR1_CRCNEXT
;
2650 SPI_CloseTx_ISR(hspi
);
2655 * @brief Handle SPI Communication Timeout.
2656 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2657 * the configuration information for SPI module.
2658 * @param Flag : SPI flag to check
2659 * @param State : flag state to check
2660 * @param Timeout : Timeout duration
2661 * @retval HAL status
2663 static HAL_StatusTypeDef
SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef
*hspi
, uint32_t Flag
, uint32_t State
, uint32_t Timeout
)
2665 uint32_t tickstart
= HAL_GetTick();
2667 while((hspi
->Instance
->SR
& Flag
) != State
)
2669 if(Timeout
!= HAL_MAX_DELAY
)
2671 if((Timeout
== 0) || ((HAL_GetTick()-tickstart
) >= Timeout
))
2673 /* Disable the SPI and reset the CRC: the CRC value should be cleared
2674 on both master and slave sides in order to resynchronize the master
2675 and slave for their respective CRC calculation */
2677 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
2678 __HAL_SPI_DISABLE_IT(hspi
, (SPI_IT_TXE
| SPI_IT_RXNE
| SPI_IT_ERR
));
2680 if((hspi
->Init
.Mode
== SPI_MODE_MASTER
)&&((hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)||(hspi
->Init
.Direction
== SPI_DIRECTION_2LINES_RXONLY
)))
2682 /* Disable SPI peripheral */
2683 __HAL_SPI_DISABLE(hspi
);
2686 /* Reset CRC Calculation */
2687 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2689 SPI_RESET_CRC(hspi
);
2692 hspi
->State
= HAL_SPI_STATE_READY
;
2694 /* Process Unlocked */
2705 * @brief Handle SPI FIFO Communication Timeout.
2706 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2707 * the configuration information for SPI module.
2708 * @param Fifo : Fifo to check
2709 * @param State : Fifo state to check
2710 * @param Timeout : Timeout duration
2711 * @retval HAL status
2713 static HAL_StatusTypeDef
SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef
*hspi
, uint32_t Fifo
, uint32_t State
, uint32_t Timeout
)
2715 __IO
uint8_t tmpreg
;
2716 uint32_t tickstart
= HAL_GetTick();
2718 while((hspi
->Instance
->SR
& Fifo
) != State
)
2720 if((Fifo
== SPI_SR_FRLVL
) && (State
== SPI_FRLVL_EMPTY
))
2722 tmpreg
= *((__IO
uint8_t*)&hspi
->Instance
->DR
);
2723 UNUSED(tmpreg
); /* To avoid GCC warning */
2726 if(Timeout
!= HAL_MAX_DELAY
)
2728 if((Timeout
== 0) || ((HAL_GetTick()-tickstart
) >= Timeout
))
2730 /* Disable the SPI and reset the CRC: the CRC value should be cleared
2731 on both master and slave sides in order to resynchronize the master
2732 and slave for their respective CRC calculation */
2734 /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
2735 __HAL_SPI_DISABLE_IT(hspi
, (SPI_IT_TXE
| SPI_IT_RXNE
| SPI_IT_ERR
));
2737 if((hspi
->Init
.Mode
== SPI_MODE_MASTER
)&&((hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)||(hspi
->Init
.Direction
== SPI_DIRECTION_2LINES_RXONLY
)))
2739 /* Disable SPI peripheral */
2740 __HAL_SPI_DISABLE(hspi
);
2743 /* Reset CRC Calculation */
2744 if(hspi
->Init
.CRCCalculation
== SPI_CRCCALCULATION_ENABLE
)
2746 SPI_RESET_CRC(hspi
);
2749 hspi
->State
= HAL_SPI_STATE_READY
;
2751 /* Process Unlocked */
2762 * @brief Handle the check of the RX transaction complete.
2763 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2764 * the configuration information for SPI module.
2765 * @param Timeout : Timeout duration
2768 static HAL_StatusTypeDef
SPI_EndRxTransaction(SPI_HandleTypeDef
*hspi
, uint32_t Timeout
)
2770 if((hspi
->Init
.Mode
== SPI_MODE_MASTER
)&&((hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)||(hspi
->Init
.Direction
== SPI_DIRECTION_2LINES_RXONLY
)))
2772 /* Disable SPI peripheral */
2773 __HAL_SPI_DISABLE(hspi
);
2776 /* Control the BSY flag */
2777 if(SPI_WaitFlagStateUntilTimeout(hspi
, SPI_FLAG_BSY
, RESET
, Timeout
) != HAL_OK
)
2779 hspi
->ErrorCode
|= HAL_SPI_ERROR_FLAG
;
2783 if((hspi
->Init
.Mode
== SPI_MODE_MASTER
)&&((hspi
->Init
.Direction
== SPI_DIRECTION_1LINE
)||(hspi
->Init
.Direction
== SPI_DIRECTION_2LINES_RXONLY
)))
2785 /* Empty the FRLVL fifo */
2786 if(SPI_WaitFifoStateUntilTimeout(hspi
, SPI_FLAG_FRLVL
, SPI_FRLVL_EMPTY
, Timeout
) != HAL_OK
)
2788 hspi
->ErrorCode
|= HAL_SPI_ERROR_FLAG
;
2796 * @brief Handle the check of the RXTX or TX transaction complete.
2797 * @param hspi: SPI handle
2798 * @param Timeout : Timeout duration
2800 static HAL_StatusTypeDef
SPI_EndRxTxTransaction(SPI_HandleTypeDef
*hspi
, uint32_t Timeout
)
2802 /* Procedure to check the transaction complete */
2803 if(SPI_WaitFifoStateUntilTimeout(hspi
, SPI_FLAG_FTLVL
, SPI_FTLVL_EMPTY
, Timeout
) != HAL_OK
)
2805 hspi
->ErrorCode
|= HAL_SPI_ERROR_FLAG
;
2808 if(SPI_WaitFifoStateUntilTimeout(hspi
, SPI_FLAG_FRLVL
, SPI_FRLVL_EMPTY
, Timeout
) != HAL_OK
)
2810 hspi
->ErrorCode
|= HAL_SPI_ERROR_FLAG
;
2813 /* Control the BSY flag */
2814 if(SPI_WaitFlagStateUntilTimeout(hspi
, SPI_FLAG_BSY
, RESET
, Timeout
) != HAL_OK
)
2816 hspi
->ErrorCode
|= HAL_SPI_ERROR_FLAG
;
2823 * @brief Handle the end of the RXTX transaction.
2824 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2825 * the configuration information for SPI module.
2828 static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef
*hspi
)
2830 /* Disable ERR interrupt */
2831 __HAL_SPI_DISABLE_IT(hspi
, SPI_IT_ERR
);
2833 /* Check the end of the transaction */
2834 if(SPI_EndRxTxTransaction(hspi
,SPI_DEFAULT_TIMEOUT
)!=HAL_OK
)
2836 hspi
->ErrorCode
|= HAL_SPI_ERROR_FLAG
;
2839 #if (USE_SPI_CRC != 0U)
2840 /* Check if CRC error occurred */
2841 if(__HAL_SPI_GET_FLAG(hspi
, SPI_FLAG_CRCERR
) != RESET
)
2843 hspi
->State
= HAL_SPI_STATE_READY
;
2844 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
2845 __HAL_SPI_CLEAR_CRCERRFLAG(hspi
);
2846 HAL_SPI_ErrorCallback(hspi
);
2851 if(hspi
->ErrorCode
== HAL_SPI_ERROR_NONE
)
2853 if(hspi
->State
== HAL_SPI_STATE_BUSY_RX
)
2855 hspi
->State
= HAL_SPI_STATE_READY
;
2856 HAL_SPI_RxCpltCallback(hspi
);
2860 hspi
->State
= HAL_SPI_STATE_READY
;
2861 HAL_SPI_TxRxCpltCallback(hspi
);
2866 hspi
->State
= HAL_SPI_STATE_READY
;
2867 HAL_SPI_ErrorCallback(hspi
);
2869 #if (USE_SPI_CRC != 0U)
2875 * @brief Handle the end of the RX transaction.
2876 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2877 * the configuration information for SPI module.
2880 static void SPI_CloseRx_ISR(SPI_HandleTypeDef
*hspi
)
2882 /* Disable RXNE and ERR interrupt */
2883 __HAL_SPI_DISABLE_IT(hspi
, (SPI_IT_RXNE
| SPI_IT_ERR
));
2885 /* Check the end of the transaction */
2886 if(SPI_EndRxTransaction(hspi
,SPI_DEFAULT_TIMEOUT
)!=HAL_OK
)
2888 hspi
->ErrorCode
|= HAL_SPI_ERROR_FLAG
;
2890 hspi
->State
= HAL_SPI_STATE_READY
;
2891 #if (USE_SPI_CRC != 0U)
2892 /* Check if CRC error occurred */
2893 if(__HAL_SPI_GET_FLAG(hspi
, SPI_FLAG_CRCERR
) != RESET
)
2895 hspi
->ErrorCode
|= HAL_SPI_ERROR_CRC
;
2896 __HAL_SPI_CLEAR_CRCERRFLAG(hspi
);
2897 HAL_SPI_ErrorCallback(hspi
);
2902 if(hspi
->ErrorCode
== HAL_SPI_ERROR_NONE
)
2904 HAL_SPI_RxCpltCallback(hspi
);
2908 HAL_SPI_ErrorCallback(hspi
);
2910 #if (USE_SPI_CRC != 0U)
2916 * @brief Handle the end of the TX transaction.
2917 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
2918 * the configuration information for SPI module.
2921 static void SPI_CloseTx_ISR(SPI_HandleTypeDef
*hspi
)
2923 /* Disable TXE and ERR interrupt */
2924 __HAL_SPI_DISABLE_IT(hspi
, (SPI_IT_TXE
| SPI_IT_ERR
));
2926 /* Check the end of the transaction */
2927 if(SPI_EndRxTxTransaction(hspi
,SPI_DEFAULT_TIMEOUT
)!=HAL_OK
)
2929 hspi
->ErrorCode
|= HAL_SPI_ERROR_FLAG
;
2932 /* Clear overrun flag in 2 Lines communication mode because received is not read */
2933 if(hspi
->Init
.Direction
== SPI_DIRECTION_2LINES
)
2935 __HAL_SPI_CLEAR_OVRFLAG(hspi
);
2938 hspi
->State
= HAL_SPI_STATE_READY
;
2939 if(hspi
->ErrorCode
!= HAL_SPI_ERROR_NONE
)
2941 HAL_SPI_ErrorCallback(hspi
);
2945 HAL_SPI_TxCpltCallback(hspi
);
2953 #endif /* HAL_SPI_MODULE_ENABLED */
2963 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/