int/com/lib/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f7xx_ll_sdmmc.c
   4   * @author  MCD Application Team
   5   * @version V1.1.0
   6   * @date    22-April-2016
   7   * @brief   SDMMC Low Layer HAL module driver.
   8   *
   9   *          This file provides firmware functions to manage the following
  10   *          functionalities of the SDMMC peripheral:
  11   *           + Initialization/de-initialization functions
  12   *           + I/O operation functions
  13   *           + Peripheral Control functions
  14   *           + Peripheral State functions
  15   *
  16   @verbatim
  17   ==============================================================================
  18                        ##### SDMMC peripheral features #####
  19   ==============================================================================
  20     [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2
  21          peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
  22          devices.
  23
  24     [..] The SDMMC features include the following:
  25          (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
  26              for three different databus modes: 1-bit (default), 4-bit and 8-bit
  27          (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
  28          (+) Full compliance with SD Memory Card Specifications Version 2.0
  29          (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
  30              different data bus modes: 1-bit (default) and 4-bit
  31          (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
  32              Rev1.1)
  33          (+) Data transfer up to 48 MHz for the 8 bit mode
  34          (+) Data and command output enable signals to control external bidirectional drivers.
  35
  36
  37                            ##### How to use this driver #####
  38   ==============================================================================
  39     [..]
  40       This driver is a considered as a driver of service for external devices drivers
  41       that interfaces with the SDMMC peripheral.
  42       According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
  43       is used in the device's driver to perform SDMMC operations and functionalities.
  44
  45       This driver is almost transparent for the final user, it is only used to implement other
  46       functionalities of the external device.
  47
  48     [..]
  49       (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output of PLL
  50           (PLL48CLK). Before start working with SDMMC peripheral make sure that the
  51           PLL is well configured.
  52           The SDMMC peripheral uses two clock signals:
  53           (++) SDMMC adapter clock (SDMMCCLK = 48 MHz)
  54           (++) APB2 bus clock (PCLK2)
  55
  56           -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
  57                Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK))
  58
  59       (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
  60           peripheral.
  61
  62       (+) Enable the Power ON State using the SDMMC_PowerState_ON(SDMMCx)
  63           function and disable it using the function SDMMC_PowerState_OFF(SDMMCx).
  64
  65       (+) Enable/Disable the clock using the __SDMMC_ENABLE()/__SDMMC_DISABLE() macros.
  66
  67       (+) Enable/Disable the peripheral interrupts using the macros __SDMMC_ENABLE_IT(hSDMMC, IT)
  68           and __SDMMC_DISABLE_IT(hSDMMC, IT) if you need to use interrupt mode.
  69
  70       (+) When using the DMA mode
  71           (++) Configure the DMA in the MSP layer of the external device
  72           (++) Active the needed channel Request
  73           (++) Enable the DMA using __SDMMC_DMA_ENABLE() macro or Disable it using the macro
  74                __SDMMC_DMA_DISABLE().
  75
  76       (+) To control the CPSM (Command Path State Machine) and send
  77           commands to the card use the SDMMC_SendCommand(SDMMCx),
  78           SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has
  79           to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according
  80           to the selected command to be sent.
  81           The parameters that should be filled are:
  82            (++) Command Argument
  83            (++) Command Index
  84            (++) Command Response type
  85            (++) Command Wait
  86            (++) CPSM Status (Enable or Disable).
  87
  88           -@@- To check if the command is well received, read the SDMMC_CMDRESP
  89               register using the SDMMC_GetCommandResponse().
  90               The SDMMC responses registers (SDMMC_RESP1 to SDMMC_RESP2), use the
  91               SDMMC_GetResponse() function.
  92
  93       (+) To control the DPSM (Data Path State Machine) and send/receive
  94            data to/from the card use the SDMMC_DataConfig(), SDMMC_GetDataCounter(),
  95           SDMMC_ReadFIFO(), DIO_WriteFIFO() and SDMMC_GetFIFOCount() functions.
  96
  97     *** Read Operations ***
  98     =======================
  99     [..]
 100       (#) First, user has to fill the data structure (pointer to
 101           SDMMC_DataInitTypeDef) according to the selected data type to be received.
 102           The parameters that should be filled are:
 103            (++) Data TimeOut
 104            (++) Data Length
 105            (++) Data Block size
 106            (++) Data Transfer direction: should be from card (To SDMMC)
 107            (++) Data Transfer mode
 108            (++) DPSM Status (Enable or Disable)
 109
 110       (#) Configure the SDMMC resources to receive the data from the card
 111           according to selected transfer mode (Refer to Step 8, 9 and 10).
 112
 113       (#) Send the selected Read command (refer to step 11).
 114
 115       (#) Use the SDMMC flags/interrupts to check the transfer status.
 116
 117     *** Write Operations ***
 118     ========================
 119     [..]
 120      (#) First, user has to fill the data structure (pointer to
 121          SDMMC_DataInitTypeDef) according to the selected data type to be received.
 122          The parameters that should be filled are:
 123           (++) Data TimeOut
 124           (++) Data Length
 125           (++) Data Block size
 126           (++) Data Transfer direction:  should be to card (To CARD)
 127           (++) Data Transfer mode
 128           (++) DPSM Status (Enable or Disable)
 129
 130      (#) Configure the SDMMC resources to send the data to the card according to
 131          selected transfer mode.
 132
 133      (#) Send the selected Write command.
 134
 135      (#) Use the SDMMC flags/interrupts to check the transfer status.
 136
 137   @endverbatim
 138   ******************************************************************************
 139   * @attention
 140   *
 141   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
 142   *
 143   * Redistribution and use in source and binary forms, with or without modification,
 144   * are permitted provided that the following conditions are met:
 145   *   1. Redistributions of source code must retain the above copyright notice,
 146   *      this list of conditions and the following disclaimer.
 147   *   2. Redistributions in binary form must reproduce the above copyright notice,
 148   *      this list of conditions and the following disclaimer in the documentation
 149   *      and/or other materials provided with the distribution.
 150   *   3. Neither the name of STMicroelectronics nor the names of its contributors
 151   *      may be used to endorse or promote products derived from this software
 152   *      without specific prior written permission.
 153   *
 154   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 155   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 156   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 157   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
 158   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 159   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 160   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 161   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 162   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 163   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 164   *
 165   ******************************************************************************
 166   */
 167
 168 /* Includes ------------------------------------------------------------------*/
 169 #include "stm32f7xx_hal.h"
 170
 171 /** @addtogroup STM32F7xx_HAL_Driver
 172   * @{
 173   */
 174
 175 /** @defgroup SDMMC_LL SDMMC Low Layer
 176   * @brief Low layer module for SD
 177   * @{
 178   */
 179
 180 #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
 181
 182 /* Private typedef -----------------------------------------------------------*/
 183 /* Private define ------------------------------------------------------------*/
 184 /* Private macro -------------------------------------------------------------*/
 185 /* Private variables ---------------------------------------------------------*/
 186 /* Private function prototypes -----------------------------------------------*/
 187 /* Exported functions --------------------------------------------------------*/
 188
 189 /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
 190   * @{
 191   */
 192
 193 /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
 194  *  @brief    Initialization and Configuration functions
 195  *
 196 @verbatim
 197  ===============================================================================
 198               ##### Initialization/de-initialization functions #####
 199  ===============================================================================
 200     [..]  This section provides functions allowing to:
 201
 202 @endverbatim
 203   * @{
 204   */
 205
 206 /**
 207   * @brief  Initializes the SDMMC according to the specified
 208   *         parameters in the SDMMC_InitTypeDef and create the associated handle.
 209   * @param  SDMMCx: Pointer to SDMMC register base
 210   * @param  Init: SDMMC initialization structure
 211   * @retval HAL status
 212   */
 213 HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init)
 214 {
 215   uint32_t tmpreg = 0;
 216
 217   /* Check the parameters */
 218   assert_param(IS_SDMMC_ALL_INSTANCE(SDMMCx));
 219   assert_param(IS_SDMMC_CLOCK_EDGE(Init.ClockEdge));
 220   assert_param(IS_SDMMC_CLOCK_BYPASS(Init.ClockBypass));
 221   assert_param(IS_SDMMC_CLOCK_POWER_SAVE(Init.ClockPowerSave));
 222   assert_param(IS_SDMMC_BUS_WIDE(Init.BusWide));
 223   assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
 224   assert_param(IS_SDMMC_CLKDIV(Init.ClockDiv));
 225
 226   /* Set SDMMC configuration parameters */
 227   tmpreg |= (Init.ClockEdge           |\
 228              Init.ClockBypass         |\
 229              Init.ClockPowerSave      |\
 230              Init.BusWide             |\
 231              Init.HardwareFlowControl |\
 232              Init.ClockDiv
 233              );
 234
 235   /* Write to SDMMC CLKCR */
 236   MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
 237
 238   return HAL_OK;
 239 }
 240
 241
 242 /**
 243   * @}
 244   */
 245
 246 /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
 247  *  @brief   Data transfers functions
 248  *
 249 @verbatim
 250  ===============================================================================
 251                       ##### I/O operation functions #####
 252  ===============================================================================
 253     [..]
 254     This subsection provides a set of functions allowing to manage the SDMMC data
 255     transfers.
 256
 257 @endverbatim
 258   * @{
 259   */
 260
 261 /**
 262   * @brief  Read data (word) from Rx FIFO in blocking mode (polling)
 263   * @param  SDMMCx: Pointer to SDMMC register base
 264   * @retval HAL status
 265   */
 266 uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx)
 267 {
 268   /* Read data from Rx FIFO */
 269   return (SDMMCx->FIFO);
 270 }
 271
 272 /**
 273   * @brief  Write data (word) to Tx FIFO in blocking mode (polling)
 274   * @param  SDMMCx: Pointer to SDMMC register base
 275   * @param  pWriteData: pointer to data to write
 276   * @retval HAL status
 277   */
 278 HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
 279 {
 280   /* Write data to FIFO */
 281   SDMMCx->FIFO = *pWriteData;
 282
 283   return HAL_OK;
 284 }
 285
 286 /**
 287   * @}
 288   */
 289
 290 /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
 291  *  @brief   management functions
 292  *
 293 @verbatim
 294  ===============================================================================
 295                       ##### Peripheral Control functions #####
 296  ===============================================================================
 297     [..]
 298     This subsection provides a set of functions allowing to control the SDMMC data
 299     transfers.
 300
 301 @endverbatim
 302   * @{
 303   */
 304
 305 /**
 306   * @brief  Set SDMMC Power state to ON.
 307   * @param  SDMMCx: Pointer to SDMMC register base
 308   * @retval HAL status
 309   */
 310 HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx)
 311 {
 312   /* Set power state to ON */
 313   SDMMCx->POWER = SDMMC_POWER_PWRCTRL;
 314
 315   return HAL_OK;
 316 }
 317
 318 /**
 319   * @brief  Set SDMMC Power state to OFF.
 320   * @param  SDMMCx: Pointer to SDMMC register base
 321   * @retval HAL status
 322   */
 323 HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx)
 324 {
 325   /* Set power state to OFF */
 326   SDMMCx->POWER = (uint32_t)0x00000000;
 327
 328   return HAL_OK;
 329 }
 330
 331 /**
 332   * @brief  Get SDMMC Power state.
 333   * @param  SDMMCx: Pointer to SDMMC register base
 334   * @retval Power status of the controller. The returned value can be one of the
 335   *         following values:
 336   *            - 0x00: Power OFF
 337   *            - 0x02: Power UP
 338   *            - 0x03: Power ON
 339   */
 340 uint32_t SDMMC_GetPowerState(SDMMC_TypeDef *SDMMCx)
 341 {
 342   return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL);
 343 }
 344
 345 /**
 346   * @brief  Configure the SDMMC command path according to the specified parameters in
 347   *         SDMMC_CmdInitTypeDef structure and send the command
 348   * @param  SDMMCx: Pointer to SDMMC register base
 349   * @param  Command: pointer to a SDMMC_CmdInitTypeDef structure that contains
 350   *         the configuration information for the SDMMC command
 351   * @retval HAL status
 352   */
 353 HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command)
 354 {
 355   uint32_t tmpreg = 0;
 356
 357   /* Check the parameters */
 358   assert_param(IS_SDMMC_CMD_INDEX(Command->CmdIndex));
 359   assert_param(IS_SDMMC_RESPONSE(Command->Response));
 360   assert_param(IS_SDMMC_WAIT(Command->WaitForInterrupt));
 361   assert_param(IS_SDMMC_CPSM(Command->CPSM));
 362
 363   /* Set the SDMMC Argument value */
 364   SDMMCx->ARG = Command->Argument;
 365
 366   /* Set SDMMC command parameters */
 367   tmpreg |= (uint32_t)(Command->CmdIndex         |\
 368                        Command->Response         |\
 369                        Command->WaitForInterrupt |\
 370                        Command->CPSM);
 371
 372   /* Write to SDMMC CMD register */
 373   MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, tmpreg);
 374
 375   return HAL_OK;
 376 }
 377
 378 /**
 379   * @brief  Return the command index of last command for which response received
 380   * @param  SDMMCx: Pointer to SDMMC register base
 381   * @retval Command index of the last command response received
 382   */
 383 uint8_t SDMMC_GetCommandResponse(SDMMC_TypeDef *SDMMCx)
 384 {
 385   return (uint8_t)(SDMMCx->RESPCMD);
 386 }
 387
 388
 389 /**
 390   * @brief  Return the response received from the card for the last command
 391   * @param  SDMMCx: Pointer to SDMMC register base
 392   * @param  Response: Specifies the SDMMC response register.
 393   *          This parameter can be one of the following values:
 394   *            @arg SDMMC_RESP1: Response Register 1
 395   *            @arg SDMMC_RESP2: Response Register 2
 396   *            @arg SDMMC_RESP3: Response Register 3
 397   *            @arg SDMMC_RESP4: Response Register 4
 398   * @retval The Corresponding response register value
 399   */
 400 uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response)
 401 {
 402   __IO uint32_t tmp = 0;
 403
 404   /* Check the parameters */
 405   assert_param(IS_SDMMC_RESP(Response));
 406
 407   /* Get the response */
 408   tmp = (uint32_t)&(SDMMCx->RESP1) + Response;
 409
 410   return (*(__IO uint32_t *) tmp);
 411 }
 412
 413 /**
 414   * @brief  Configure the SDMMC data path according to the specified
 415   *         parameters in the SDMMC_DataInitTypeDef.
 416   * @param  SDMMCx: Pointer to SDMMC register base
 417   * @param  Data : pointer to a SDMMC_DataInitTypeDef structure
 418   *         that contains the configuration information for the SDMMC data.
 419   * @retval HAL status
 420   */
 421 HAL_StatusTypeDef SDMMC_DataConfig(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef* Data)
 422 {
 423   uint32_t tmpreg = 0;
 424
 425   /* Check the parameters */
 426   assert_param(IS_SDMMC_DATA_LENGTH(Data->DataLength));
 427   assert_param(IS_SDMMC_BLOCK_SIZE(Data->DataBlockSize));
 428   assert_param(IS_SDMMC_TRANSFER_DIR(Data->TransferDir));
 429   assert_param(IS_SDMMC_TRANSFER_MODE(Data->TransferMode));
 430   assert_param(IS_SDMMC_DPSM(Data->DPSM));
 431
 432   /* Set the SDMMC Data TimeOut value */
 433   SDMMCx->DTIMER = Data->DataTimeOut;
 434
 435   /* Set the SDMMC DataLength value */
 436   SDMMCx->DLEN = Data->DataLength;
 437
 438   /* Set the SDMMC data configuration parameters */
 439   tmpreg |= (uint32_t)(Data->DataBlockSize |\
 440                        Data->TransferDir   |\
 441                        Data->TransferMode  |\
 442                        Data->DPSM);
 443
 444   /* Write to SDMMC DCTRL */
 445   MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
 446
 447   return HAL_OK;
 448
 449 }
 450
 451 /**
 452   * @brief  Returns number of remaining data bytes to be transferred.
 453   * @param  SDMMCx: Pointer to SDMMC register base
 454   * @retval Number of remaining data bytes to be transferred
 455   */
 456 uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx)
 457 {
 458   return (SDMMCx->DCOUNT);
 459 }
 460
 461 /**
 462   * @brief  Get the FIFO data
 463   * @param  SDMMCx: Pointer to SDMMC register base
 464   * @retval Data received
 465   */
 466 uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx)
 467 {
 468   return (SDMMCx->FIFO);
 469 }
 470
 471
 472 /**
 473   * @brief  Sets one of the two options of inserting read wait interval.
 474   * @param  SDMMCx: Pointer to SDMMC register base
 475   * @param  SDMMC_ReadWaitMode: SDMMC Read Wait operation mode.
 476   *          This parameter can be:
 477   *            @arg SDMMC_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
 478   *            @arg SDMMC_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
 479   * @retval None
 480   */
 481 HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
 482 {
 483   /* Check the parameters */
 484   assert_param(IS_SDMMC_READWAIT_MODE(SDMMC_ReadWaitMode));
 485
 486   /* Set SDMMC read wait mode */
 487   MODIFY_REG(SDMMCx->DCTRL, SDMMC_DCTRL_RWMOD, SDMMC_ReadWaitMode);
 488
 489   return HAL_OK;
 490 }
 491
 492 /**
 493   * @}
 494   */
 495
 496 /**
 497   * @}
 498   */
 499
 500 #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
 501 /**
 502   * @}
 503   */
 504
 505 /**
 506   * @}
 507   */
 508
 509 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/