working chip location

[master.git] / ar / assignments / 2.tex

diff --git a/ar/assignments/2.tex b/ar/assignments/2.tex
index 5731d97..7bd482d 100644 (file)
--- a/ar/assignments/2.tex
+++ b/ar/assignments/2.tex
@@ -38,15 +38,15 @@ specified width and height.
                \nonumber & \qquad\qquad\qquad \vee c_iy>c_jy+c_jh\\
                \nonumber & \qquad\qquad\qquad \vee c_iy+c_jh<c_jh\Bigr)\Biggr)\wedge\\
        \bigwedge_{i\in PC}\bigwedge_{j\in PC}\Biggl( & i=j\\
-               \nonumber & \vee\frac{c_ix+c_iw}{2}-\frac{c_jx+c_jw}{2}>15\\
-               \nonumber & \vee\frac{c_jx+c_jw}{2}-\frac{c_ix+c_iw}{2}>15\\
-               \nonumber & \vee\frac{c_iy+c_ih}{2}-\frac{c_jy+c_jh}{2}>15\\
-               \nonumber & \vee\frac{c_jy+c_jh}{2}-\frac{c_iy+c_ih}{2}>15\Biggr)\wedge\\
-       \bigwedge_{i\in RC}\bigvee_{j\in PC}\Biggl(
-               \nonumber & !(     c_ix-1     >c_jx+c_jw\\
+               \nonumber & \vee c_ix+\frac{c_iw}{2}-c_jx+\frac{c_jw}{2}>15\\
+               \nonumber & \vee c_jx+\frac{c_jw}{2}-c_ix+\frac{c_iw}{2}>15\\
+               \nonumber & \vee c_iy+\frac{c_ih}{2}-c_jy+\frac{c_jh}{2}>15\\
+               \nonumber & \vee c_jy+\frac{c_jh}{2}-c_iy+\frac{c_ih}{2}>15\Biggr)\wedge\\
+       \bigwedge_{i\in RC}\bigvee_{j\in PC}\neg\Biggl(
+               & (c_ix-1>c_jx+c_jw\\
                \nonumber & \vee c_ix+1+c_jw<c_jx\\
-               \nonumber & \vee c_iy-1     >c_jy+c_jh\\
-               \nonumber & \vee c_iy+1+c_jh<c_jh\Biggr)\\
+               \nonumber & \vee c_iy-1>c_jy+c_jh\\
+               \nonumber & \vee c_iy+1+c_jh<c_jh\Biggr)
 \end{align}
 
 \subsection{SMT format solution}